From patchwork Wed Oct 18 09:29:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varadarajan Narayanan X-Patchwork-Id: 154782 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp4666529vqb; Wed, 18 Oct 2023 02:32:58 -0700 (PDT) X-Google-Smtp-Source: AGHT+IF/r2mZeG9uctgub2DgR/WTs0RsYfmIjjSVBA3Z8P1CWdtLtOsQEDOxoOkaYWcPjN6blMOM X-Received: by 2002:a17:902:cec7:b0:1c4:1cd3:8062 with SMTP id d7-20020a170902cec700b001c41cd38062mr4756434plg.2.1697621578065; Wed, 18 Oct 2023 02:32:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697621578; cv=none; d=google.com; s=arc-20160816; b=Q8coY47fwz59HPO9ib/mC36kb3f9ToW6iKPuOX3dlCsr9SWhTbhZrTbmyTIb639ymt 47afBuZlTDH8VpB1WSX5o6Cy027vAvTUA7273547Ctgtoyui98AGkeK59PCMiVqW11tk dxUzsBRqPOiSZHc4/0KMyJV0q+8Kina5bHt077ixUuaAXXgt6PoRZPC8ivcBwqL2sqap J8pHCa9VkIw6mWOFpPPs/ktuaDrpZy33qgxhzX9SO1b53so8kqFLMexINkh9HjMufIfl R8n83WEAXV+L1PdVhO4Y+cg9kzRuKNeVnpN+jEfqOJtUlAf2TpmvTKLoWSoPH99ngBlr j+aQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=T/oG60Q9zeRn1XvdoFfQJ2ViE5hDmDaNlQSy1uGrojE=; fh=TexRbNhpseSDwji4zm0ZYE1dIqB1VQ9GLSRhn7EXsPo=; b=cU1q842v+PFjk+lMJVnmb5EDwYdJQxCOg2PR1yRZg9mwwFUwL8GniUwOrwqXPO5aQl NYpJkWYe/Fth5Kl8V4UZ4SwIzn980SCjNmPx7ksZ0sRsaXfmiqaXyxG45dIZNdy0Vfdv lFClkT3LSCLPKTpV839L5tYjIT+a2CUwr2DPduEEALNjoFRKQpJtinaFNj9XqPoYFPyA KhEy29vY9mxYmRzflV7/lYg5/NnsdYFojLxGtLadDVUDbUvOtelVw4PfssCs780s3wMw 7HxM5g3p9ZoAH3WPSh624x6wQkwm2amv2UkUe9TYKvOAYNF86uJR6oj6X6NJxJFQRJmR Euyg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=KOwub9r2; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from morse.vger.email (morse.vger.email. [2620:137:e000::3:1]) by mx.google.com with ESMTPS id j6-20020a170903024600b001c0eefc0dfesi4020958plh.130.2023.10.18.02.32.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 02:32:58 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) client-ip=2620:137:e000::3:1; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=KOwub9r2; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by morse.vger.email (Postfix) with ESMTP id 3F09C80FFD8F; Wed, 18 Oct 2023 02:32:53 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at morse.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230443AbjJRJco (ORCPT + 24 others); Wed, 18 Oct 2023 05:32:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47886 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230368AbjJRJcY (ORCPT ); Wed, 18 Oct 2023 05:32:24 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DCF2A1AD; Wed, 18 Oct 2023 02:31:24 -0700 (PDT) Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 39I7dH60024520; Wed, 18 Oct 2023 09:31:21 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=T/oG60Q9zeRn1XvdoFfQJ2ViE5hDmDaNlQSy1uGrojE=; b=KOwub9r25lbfH4Ynjwlkksxz/5ZgywxBaTIblGbWlS/3G9Yi66R0TW3maDGRcj8ubyUN Xg91Sv9bX2zQgrxCMhbLKtn7PF9oEqTsIqu7cAcphvNMpcm6gqvuKJ9+ywsCJykQAFMM x6MAX9aVqytNiAJB+idx0n8CGZR188h/H+RvOHzj+6JuQGfhJJknvbnn3umI4hm8rEZX uKsW3QZZ31VoT6i6HPfmgHUWS91x6cW1lfakmYuBiEtwqMp8EQ+GkU+MEm6PbYBCimCS Gu2cXgvqSTjw14nNS4FGqP3VTZbIZ2uhrtxHXh6jmMVZBIv1j7p/b4z9JGe5BdomqGxN ag== Received: from nasanppmta04.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3tt5v80rsk-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 18 Oct 2023 09:31:21 +0000 Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39I9UuOm032409 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 18 Oct 2023 09:30:57 GMT Received: from varda-linux.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Wed, 18 Oct 2023 02:30:51 -0700 From: Varadarajan Narayanan To: , , , , , , , , , , , , , , , , CC: Varadarajan Narayanan Subject: [PATCH v3 6/8] arm64: dts: qcom: ipq5332: populate the opp table based on the eFuse Date: Wed, 18 Oct 2023 14:59:19 +0530 Message-ID: X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: k7mr5MDZvN8zAVhTdbIPfR8MbZe4O4VL X-Proofpoint-ORIG-GUID: k7mr5MDZvN8zAVhTdbIPfR8MbZe4O4VL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-18_07,2023-10-17_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 mlxlogscore=939 lowpriorityscore=0 phishscore=0 impostorscore=0 suspectscore=0 mlxscore=0 clxscore=1015 bulkscore=0 priorityscore=1501 spamscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310180080 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Wed, 18 Oct 2023 02:32:53 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780085243697451054 X-GMAIL-MSGID: 1780085243697451054 IPQ53xx have different OPPs available for the CPU based on SoC variant. This can be determined through use of an eFuse register present in the silicon. Add support to read the eFuse and populate the OPPs based on it. ------------------------------------------------ Frequency BIT2 BIT1 opp-supported-hw 1.1GHz 1.5GHz ------------------------------------------------ 1100000000 1 1 0xf 1500000000 0 1 0x3 ------------------------------------------------ Signed-off-by: Kathiravan T Signed-off-by: Varadarajan Narayanan --- v2: Fix inconsistencies in comment and move it to commit log as suggested Remove opp-microvolt entries as no regulator is managed by Linux cpu_speed_bin -> cpu-speed-bin in node name Remove "nvmem-cell-names" due to dtbs_check error --- arch/arm64/boot/dts/qcom/ipq5332.dtsi | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi index 4206f05..a0dcba3 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi @@ -91,11 +91,19 @@ }; cpu_opp_table: opp-table-cpu { - compatible = "operating-points-v2"; + compatible = "operating-points-v2-kryo-cpu"; opp-shared; + nvmem-cells = <&cpu_speed_bin>; - opp-1488000000 { - opp-hz = /bits/ 64 <1488000000>; + opp-1100000000 { + opp-hz = /bits/ 64 <1100000000>; + opp-supported-hw = <0xF>; + clock-latency-ns = <200000>; + }; + + opp-1500000000 { + opp-hz = /bits/ 64 <1500000000>; + opp-supported-hw = <0x3>; clock-latency-ns = <200000>; }; }; @@ -163,6 +171,11 @@ reg = <0x000a4000 0x721>; #address-cells = <1>; #size-cells = <1>; + + cpu_speed_bin: cpu-speed-bin@1d { + reg = <0x1d 0x2>; + bits = <7 2>; + }; }; rng: rng@e3000 {