[2/2] watchdog: dw_wdt: Simplify clk management
Commit Message
Use devm_clk_get_enabled() instead of hand-writing it.
This saves some LoC.
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
---
This change the order the resources will be released, so review with care.
---
drivers/watchdog/dw_wdt.c | 44 ++++++++++-----------------------------
1 file changed, 11 insertions(+), 33 deletions(-)
Comments
On Wed, Apr 26, 2023 at 08:52:49AM +0200, Christophe JAILLET wrote:
> Use devm_clk_get_enabled() instead of hand-writing it.
> This saves some LoC.
>
> Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
> ---
> This change the order the resources will be released, so review with care.
> ---
> drivers/watchdog/dw_wdt.c | 44 ++++++++++-----------------------------
> 1 file changed, 11 insertions(+), 33 deletions(-)
>
> diff --git a/drivers/watchdog/dw_wdt.c b/drivers/watchdog/dw_wdt.c
> index a1354a59eb37..84dca3695f86 100644
> --- a/drivers/watchdog/dw_wdt.c
> +++ b/drivers/watchdog/dw_wdt.c
> @@ -566,22 +566,16 @@ static int dw_wdt_drv_probe(struct platform_device *pdev)
> * to the common timer/bus clocks configuration, in which the very
> * first found clock supply both timer and APB signals.
> */
> - dw_wdt->clk = devm_clk_get(dev, "tclk");
> + dw_wdt->clk = devm_clk_get_enabled(dev, "tclk");
> if (IS_ERR(dw_wdt->clk)) {
> - dw_wdt->clk = devm_clk_get(dev, NULL);
> + dw_wdt->clk = devm_clk_get_enabled(dev, NULL);
> if (IS_ERR(dw_wdt->clk))
> return PTR_ERR(dw_wdt->clk);
> }
>
> - ret = clk_prepare_enable(dw_wdt->clk);
> - if (ret)
> - return ret;
> -
> dw_wdt->rate = clk_get_rate(dw_wdt->clk);
> - if (dw_wdt->rate == 0) {
> - ret = -EINVAL;
> - goto out_disable_clk;
> - }
> + if (dw_wdt->rate == 0)
> + return -EINVAL;
>
> /*
> * Request APB clock if device is configured with async clocks mode.
> @@ -590,21 +584,13 @@ static int dw_wdt_drv_probe(struct platform_device *pdev)
> * so the pclk phandle reference is left optional. If it couldn't be
> * found we consider the device configured in synchronous clocks mode.
> */
> - dw_wdt->pclk = devm_clk_get_optional(dev, "pclk");
> - if (IS_ERR(dw_wdt->pclk)) {
> - ret = PTR_ERR(dw_wdt->pclk);
> - goto out_disable_clk;
> - }
> -
> - ret = clk_prepare_enable(dw_wdt->pclk);
> - if (ret)
> - goto out_disable_clk;
> + dw_wdt->pclk = devm_clk_get_optional_enabled(dev, "pclk");
> + if (IS_ERR(dw_wdt->pclk))
> + return PTR_ERR(dw_wdt->pclk);
>
> dw_wdt->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL);
> - if (IS_ERR(dw_wdt->rst)) {
> - ret = PTR_ERR(dw_wdt->rst);
> - goto out_disable_pclk;
> - }
> + if (IS_ERR(dw_wdt->rst))
> + return PTR_ERR(dw_wdt->rst);
>
> /* Enable normal reset without pre-timeout by default. */
> dw_wdt_update_mode(dw_wdt, DW_WDT_RMOD_RESET);
> @@ -621,12 +607,12 @@ static int dw_wdt_drv_probe(struct platform_device *pdev)
> IRQF_SHARED | IRQF_TRIGGER_RISING,
> pdev->name, dw_wdt);
> if (ret)
> - goto out_disable_pclk;
> + return ret;
>
> dw_wdt->wdd.info = &dw_wdt_pt_ident;
> } else {
> if (ret == -EPROBE_DEFER)
> - goto out_disable_pclk;
> + return ret;
>
> dw_wdt->wdd.info = &dw_wdt_ident;
> }
> @@ -675,12 +661,6 @@ static int dw_wdt_drv_probe(struct platform_device *pdev)
>
> out_assert_rst:
> reset_control_assert(dw_wdt->rst);
> -
> -out_disable_pclk:
> - clk_disable_unprepare(dw_wdt->pclk);
> -
> -out_disable_clk:
> - clk_disable_unprepare(dw_wdt->clk);
> return ret;
> }
>
> @@ -692,8 +672,6 @@ static void dw_wdt_drv_remove(struct platform_device *pdev)
>
> watchdog_unregister_device(&dw_wdt->wdd);
> reset_control_assert(dw_wdt->rst);
> - clk_disable_unprepare(dw_wdt->pclk);
> - clk_disable_unprepare(dw_wdt->clk);
> }
>
> #ifdef CONFIG_OF
> --
> 2.34.1
>
@@ -566,22 +566,16 @@ static int dw_wdt_drv_probe(struct platform_device *pdev)
* to the common timer/bus clocks configuration, in which the very
* first found clock supply both timer and APB signals.
*/
- dw_wdt->clk = devm_clk_get(dev, "tclk");
+ dw_wdt->clk = devm_clk_get_enabled(dev, "tclk");
if (IS_ERR(dw_wdt->clk)) {
- dw_wdt->clk = devm_clk_get(dev, NULL);
+ dw_wdt->clk = devm_clk_get_enabled(dev, NULL);
if (IS_ERR(dw_wdt->clk))
return PTR_ERR(dw_wdt->clk);
}
- ret = clk_prepare_enable(dw_wdt->clk);
- if (ret)
- return ret;
-
dw_wdt->rate = clk_get_rate(dw_wdt->clk);
- if (dw_wdt->rate == 0) {
- ret = -EINVAL;
- goto out_disable_clk;
- }
+ if (dw_wdt->rate == 0)
+ return -EINVAL;
/*
* Request APB clock if device is configured with async clocks mode.
@@ -590,21 +584,13 @@ static int dw_wdt_drv_probe(struct platform_device *pdev)
* so the pclk phandle reference is left optional. If it couldn't be
* found we consider the device configured in synchronous clocks mode.
*/
- dw_wdt->pclk = devm_clk_get_optional(dev, "pclk");
- if (IS_ERR(dw_wdt->pclk)) {
- ret = PTR_ERR(dw_wdt->pclk);
- goto out_disable_clk;
- }
-
- ret = clk_prepare_enable(dw_wdt->pclk);
- if (ret)
- goto out_disable_clk;
+ dw_wdt->pclk = devm_clk_get_optional_enabled(dev, "pclk");
+ if (IS_ERR(dw_wdt->pclk))
+ return PTR_ERR(dw_wdt->pclk);
dw_wdt->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL);
- if (IS_ERR(dw_wdt->rst)) {
- ret = PTR_ERR(dw_wdt->rst);
- goto out_disable_pclk;
- }
+ if (IS_ERR(dw_wdt->rst))
+ return PTR_ERR(dw_wdt->rst);
/* Enable normal reset without pre-timeout by default. */
dw_wdt_update_mode(dw_wdt, DW_WDT_RMOD_RESET);
@@ -621,12 +607,12 @@ static int dw_wdt_drv_probe(struct platform_device *pdev)
IRQF_SHARED | IRQF_TRIGGER_RISING,
pdev->name, dw_wdt);
if (ret)
- goto out_disable_pclk;
+ return ret;
dw_wdt->wdd.info = &dw_wdt_pt_ident;
} else {
if (ret == -EPROBE_DEFER)
- goto out_disable_pclk;
+ return ret;
dw_wdt->wdd.info = &dw_wdt_ident;
}
@@ -675,12 +661,6 @@ static int dw_wdt_drv_probe(struct platform_device *pdev)
out_assert_rst:
reset_control_assert(dw_wdt->rst);
-
-out_disable_pclk:
- clk_disable_unprepare(dw_wdt->pclk);
-
-out_disable_clk:
- clk_disable_unprepare(dw_wdt->clk);
return ret;
}
@@ -692,8 +672,6 @@ static void dw_wdt_drv_remove(struct platform_device *pdev)
watchdog_unregister_device(&dw_wdt->wdd);
reset_control_assert(dw_wdt->rst);
- clk_disable_unprepare(dw_wdt->pclk);
- clk_disable_unprepare(dw_wdt->clk);
}
#ifdef CONFIG_OF