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Wed, 19 Jul 2023 01:56:48 -0500 From: Sandipan Das To: , , CC: , , , , , , , , , , , , , , , , , Subject: [PATCH 2/6] perf/x86/amd/uncore: Use rdmsr if rdpmc is unavailable Date: Wed, 19 Jul 2023 12:25:37 +0530 Message-ID: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT088:EE_|MW4PR12MB6804:EE_ X-MS-Office365-Filtering-Correlation-Id: 37ab0781-7c32-4bb3-7124-08db88255652 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: q23gPQJ3+2deyNACQ51Cn6LLM2ksAxGDdEvmQZLTVCrPSN2xlLKEE50Fq4kNCNh1nmveZAIb8EcHyp+jLT+CpGAsgAHBkOwK3r3replTaQ5LFRxxRSLc1QDFWEc5SaGWPdgcnKjeuhcYpn/La5WkxHhbkXawL4EI/BzZzpqVCVK0L9l2xCo2heTT2f8/h3S5WRFLj01fcE4g42aFVSgIPJLgblPi1Mkp5ygDCS2y5iaIe6f3mvk4q4E+C712n9sj/f/1raOV8s1wqH4l3I5Q2bFfCeP3jmFcitnNMB9BQzzxM2UscJbbpfLWdJ0CwwBxSCj3oST22htzg9M+qk+jYhMlpx+CA3p1MOTQL+zPwu/h9jGxlATfDASvTuxLhWlzNFlAMYJlTwvuaP/ObURDMUN1Y1Usj5f44fnZHexORxLpclL5pWob21DacXvpuS4xNAZTuPsMuGuSuLMnQ2CyksedX5ApyM3PKrLd/5lzRVL8jgpd0Gv5KatMaI5aGKNVwTghu86r57tvnjcqIT4Cmy7wB/ONeZYJL+o9t07FRB/iebgytbtwlTk4snrSYEfj7LTdtnmdRE21ayoQGjuAqs7yYGyQ4v9VBiOWNcrYFSLlQGgJRuybebQxB+OUdq95i67nG51im9v6Tg3Gs1B9mKBEVPIwjnFPV15+M0biUREPmK0XeT6oDFJxT4OcPLfEisoRxw6TkO+ktBWuPLQYW+oz5Yg8kpEiS5GnqsTjlmW4G0dbweiej9FtGMJ6CRL0b/KozUSTIzVfsxL0U0EbuA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(136003)(396003)(376002)(39860400002)(346002)(82310400008)(451199021)(40470700004)(36840700001)(46966006)(7416002)(8676002)(82740400003)(44832011)(41300700001)(86362001)(5660300002)(8936002)(4326008)(316002)(47076005)(83380400001)(426003)(2616005)(81166007)(356005)(70206006)(70586007)(2906002)(36756003)(110136005)(40460700003)(54906003)(478600001)(16526019)(6666004)(36860700001)(186003)(336012)(26005)(40480700001)(36900700001);DIR:OUT;SFP:1101; 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In such cases, read the count from the corresponding PERF_CTR register using the RDMSR instruction. Signed-off-by: Sandipan Das --- arch/x86/events/amd/uncore.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c index b0afbe6d9eb4..f17df6574ba5 100644 --- a/arch/x86/events/amd/uncore.c +++ b/arch/x86/events/amd/uncore.c @@ -76,7 +76,16 @@ static void amd_uncore_read(struct perf_event *event) */ prev = local64_read(&hwc->prev_count); - rdpmcl(hwc->event_base_rdpmc, new); + + /* + * Some uncore PMUs do not have RDPMC assignments. In such cases, + * read counts directly from the corresponding PERF_CTR. + */ + if (hwc->event_base_rdpmc < 0) + rdmsrl(hwc->event_base, new); + else + rdpmcl(hwc->event_base_rdpmc, new); + local64_set(&hwc->prev_count, new); delta = (new << COUNTER_SHIFT) - (prev << COUNTER_SHIFT); delta >>= COUNTER_SHIFT; @@ -144,6 +153,9 @@ static int amd_uncore_add(struct perf_event *event, int flags) hwc->event_base_rdpmc = uncore->rdpmc_base + hwc->idx; hwc->state = PERF_HES_UPTODATE | PERF_HES_STOPPED; + if (uncore->rdpmc_base < 0) + hwc->event_base_rdpmc = -1; + if (flags & PERF_EF_START) event->pmu->start(event, PERF_EF_RELOAD);