From patchwork Tue Nov 29 01:20:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Asutosh Das X-Patchwork-Id: 27001 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp55932wrr; Mon, 28 Nov 2022 17:24:11 -0800 (PST) X-Google-Smtp-Source: AA0mqf5eTF2b2AqISAzTxMGFWZ9hoFoced+nN+Usiqy2aSuXgyY4imKDSzxax8UQcZi1I8gu7+O6 X-Received: by 2002:a63:586:0:b0:478:4259:ce10 with SMTP id 128-20020a630586000000b004784259ce10mr50862pgf.246.1669685050888; Mon, 28 Nov 2022 17:24:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669685050; cv=none; d=google.com; s=arc-20160816; b=LMf0Vuak8A0L7Wx++9glh+yxyfUhRvP0BMhV4TAk7zedgy3R4vwW8c36gmE95NJKPn FY+9KfE63eJcCDLxUF24o3CdViUVFgvUwO/7pjuGopkkKcG8/XMDrJUGeNyaUuLsXppI R16Y3WVeVHrGS+Zi1xJODorkpsdMeabKpnmtBCC3joy1qdL2CKLgs4ckWrtrPze4enCj f9ooLC8qNgfYz3LntxfWnyH0Xz4iLg6OvfZRvQNtXjCwgI7L0m0hQdy9ga4CsqymQ+vr WcukI2e8mWglHmb87nZj3lTsEwBTP+mQWB8e3h6vyeQ//uUCwzc/jIRuGM5QydwEf9xz pb6g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=2SzJ0jwsuCZJlIrXRCEL6A2GLsxcfWhau5MzV93JaM0=; b=RoouBP5aWdmpku46KnvpV0pxE/gO0eCd0+caND49bbEA9q+2T8BB/qbKANcjJ10g7Z C5NENPJQWotQ1O4EyArkHQns71pDj3z2t071KGOHdPDsYec8BgvOU/LgOy64O4jwKbyB +A9QPQe4w+u0rALbI+xdSnCtVFwFc5cUDfqCQMArllHC4HVS0sz3hv+J17QYgs6Lr9pe NogMo4WVQYtxFCjtguqaB4Sp65aa+m+zwwAsb/M1zrUz2eQzTWJO/+THIDytG0AbNBqO R0dRfu+/RbYf8qg1CjtrL9uFdO0AGnd3o+LACi3kELas5ZiirEYRiV7O8JL7Hh47c0BH MSvQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=vLzDdfqQ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id j6-20020a625506000000b0054307ac90f1si12784971pfb.319.2022.11.28.17.23.57; Mon, 28 Nov 2022 17:24:10 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=vLzDdfqQ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235005AbiK2BVs (ORCPT + 99 others); Mon, 28 Nov 2022 20:21:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49908 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234981AbiK2BVk (ORCPT ); Mon, 28 Nov 2022 20:21:40 -0500 Received: from alexa-out-sd-02.qualcomm.com (alexa-out-sd-02.qualcomm.com [199.106.114.39]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 704DA40911; Mon, 28 Nov 2022 17:21:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1669684898; x=1701220898; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=2SzJ0jwsuCZJlIrXRCEL6A2GLsxcfWhau5MzV93JaM0=; b=vLzDdfqQdwFowWwE2p/X9kw2rspPABnNQNNNC7ZYKU9x4yoZXKMO0+39 4MfzuF0e0FjtczDCHUCk0BQsy8PrXDG2uCcPWvedR6F9XkdbKHdMfHM1r MdJtGslH4Dedk59/JGlisP/o+GMY/DLEy3OtrjU3VXUhxEfxvECj3luTL I=; Received: from unknown (HELO ironmsg-SD-alpha.qualcomm.com) ([10.53.140.30]) by alexa-out-sd-02.qualcomm.com with ESMTP; 28 Nov 2022 17:21:37 -0800 X-QCInternal: smtphost Received: from unknown (HELO nasanex01a.na.qualcomm.com) ([10.52.223.231]) by ironmsg-SD-alpha.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Nov 2022 17:21:37 -0800 Received: from asutoshd-linux1.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Mon, 28 Nov 2022 17:21:36 -0800 From: Asutosh Das To: , , CC: , , , , , , , , , Asutosh Das , , Alim Akhtar , "James E.J. Bottomley" , Jinyoung Choi , open list Subject: [PATCH v6 04/16] ufs: core: Defer adding host to scsi if mcq is supported Date: Mon, 28 Nov 2022 17:20:45 -0800 Message-ID: X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750791671889042147?= X-GMAIL-MSGID: =?utf-8?q?1750791671889042147?= If MCQ support is present, enabling it after MCQ support has been configured would require reallocating tags and memory. It would also free up the already allocated memory in Single Doorbell Mode. So defer invoking scsi_add_host() until MCQ is configured. Co-developed-by: Can Guo Signed-off-by: Can Guo Signed-off-by: Asutosh Das Reviewed-by: Bart Van Assche Reviewed-by: Manivannan Sadhasivam --- drivers/ufs/core/ufshcd.c | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index eca15b0..3c2220c 100644 --- a/drivers/ufs/core/ufshcd.c +++ b/drivers/ufs/core/ufshcd.c @@ -92,6 +92,11 @@ /* UFSHC 4.0 compliant HC support this mode, refer param_set_mcq_mode() */ static bool use_mcq_mode = true; +static bool is_mcq_supported(struct ufs_hba *hba) +{ + return hba->mcq_sup && use_mcq_mode; +} + static int param_set_mcq_mode(const char *val, const struct kernel_param *kp) { int ret; @@ -8227,6 +8232,7 @@ static int ufshcd_probe_hba(struct ufs_hba *hba, bool init_dev_params) int ret; unsigned long flags; ktime_t start = ktime_get(); + struct Scsi_Host *host = hba->host; hba->ufshcd_state = UFSHCD_STATE_RESET; @@ -8261,6 +8267,14 @@ static int ufshcd_probe_hba(struct ufs_hba *hba, bool init_dev_params) ret = ufshcd_device_params_init(hba); if (ret) goto out; + + if (is_mcq_supported(hba)) { + ret = scsi_add_host(host, hba->dev); + if (ret) { + dev_err(hba->dev, "scsi_add_host failed\n"); + goto out; + } + } } ufshcd_tune_unipro_params(hba); @@ -9857,10 +9871,12 @@ int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq) hba->is_irq_enabled = true; } - err = scsi_add_host(host, hba->dev); - if (err) { - dev_err(hba->dev, "scsi_add_host failed\n"); - goto out_disable; + if (!is_mcq_supported(hba)) { + err = scsi_add_host(host, hba->dev); + if (err) { + dev_err(hba->dev, "scsi_add_host failed\n"); + goto out_disable; + } } hba->tmf_tag_set = (struct blk_mq_tag_set) {