diff mbox series

[v1,2/2] platform/mellanox: mlxbf-pmc: Add support for clock_measure performance block

Message ID c818d6398b8f702a978ce4dbffa58bb8b08f36b2.1706607635.git.shravankr@nvidia.com
State New
Headers
Series Feature additions to mlxbf-pmc driver |

Commit Message

Shravan Kumar Ramani Jan. 30, 2024, 9:53 a.m. UTC 
  The HW clock_measure counter info is passed to the driver from ACPI.
Create a new sub-directory for clock_measure events and provide
read access to the user. Writes are blocked since the fields are RO.

Signed-off-by: Shravan Kumar Ramani <shravankr@nvidia.com>
Reviewed-by: David Thompson <davthompson@nvidia.com>
Reviewed-by: Vadim Pasternak <vadimp@nvidia.com>
---
 drivers/platform/mellanox/mlxbf-pmc.c | 46 ++++++++++++++++++++++++---
 1 file changed, 42 insertions(+), 4 deletions(-)

Comments

Ilpo Järvinen Jan. 31, 2024, 10:23 a.m. UTC | #1 
On Tue, 30 Jan 2024, Shravan Kumar Ramani wrote:

> The HW clock_measure counter info is passed to the driver from ACPI.
> Create a new sub-directory for clock_measure events and provide
> read access to the user. Writes are blocked since the fields are RO.
> 
> Signed-off-by: Shravan Kumar Ramani <shravankr@nvidia.com>
> Reviewed-by: David Thompson <davthompson@nvidia.com>
> Reviewed-by: Vadim Pasternak <vadimp@nvidia.com>
> ---
>  drivers/platform/mellanox/mlxbf-pmc.c | 46 ++++++++++++++++++++++++---
>  1 file changed, 42 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/platform/mellanox/mlxbf-pmc.c b/drivers/platform/mellanox/mlxbf-pmc.c
> index 906dfa96f783..e1c0e2f04abb 100644
> --- a/drivers/platform/mellanox/mlxbf-pmc.c
> +++ b/drivers/platform/mellanox/mlxbf-pmc.c
> @@ -865,6 +865,37 @@ static const struct mlxbf_pmc_events mlxbf_pmc_llt_miss_events[] = {
>  	{75, "HISTOGRAM_HISTOGRAM_BIN9"},
>  };
>  
> +static const struct mlxbf_pmc_events mlxbf_pmc_clock_events[] = {
> +	{ 0x0, "FMON_CLK_LAST_COUNT_PLL_D1_INST0" },
> +	{ 0x4, "REFERENCE_WINDOW_WIDTH_PLL_D1_INST0" },
> +	{ 0x8, "FMON_CLK_LAST_COUNT_PLL_D1_INST1" },
> +	{ 0xc, "REFERENCE_WINDOW_WIDTH_PLL_D1_INST1" },
> +	{ 0x10, "FMON_CLK_LAST_COUNT_PLL_G1" },
> +	{ 0x14, "REFERENCE_WINDOW_WIDTH_PLL_G1" },
> +	{ 0x18, "FMON_CLK_LAST_COUNT_PLL_W1" },
> +	{ 0x1c, "REFERENCE_WINDOW_WIDTH_PLL_W1" },
> +	{ 0x20, "FMON_CLK_LAST_COUNT_PLL_T1" },
> +	{ 0x24, "REFERENCE_WINDOW_WIDTH_PLL_T1" },
> +	{ 0x28, "FMON_CLK_LAST_COUNT_PLL_A0" },
> +	{ 0x2c, "REFERENCE_WINDOW_WIDTH_PLL_A0" },
> +	{ 0x30, "FMON_CLK_LAST_COUNT_PLL_C0" },
> +	{ 0x34, "REFERENCE_WINDOW_WIDTH_PLL_C0" },
> +	{ 0x38, "FMON_CLK_LAST_COUNT_PLL_N1" },
> +	{ 0x3c, "REFERENCE_WINDOW_WIDTH_PLL_N1" },
> +	{ 0x40, "FMON_CLK_LAST_COUNT_PLL_I1" },
> +	{ 0x44, "REFERENCE_WINDOW_WIDTH_PLL_I1" },
> +	{ 0x48, "FMON_CLK_LAST_COUNT_PLL_R1" },
> +	{ 0x4c, "REFERENCE_WINDOW_WIDTH_PLL_R1" },
> +	{ 0x50, "FMON_CLK_LAST_COUNT_PLL_P1" },
> +	{ 0x54, "REFERENCE_WINDOW_WIDTH_PLL_P1" },
> +	{ 0x58, "FMON_CLK_LAST_COUNT_REF_100_INST0" },
> +	{ 0x5c, "REFERENCE_WINDOW_WIDTH_REF_100_INST0" },
> +	{ 0x60, "FMON_CLK_LAST_COUNT_REF_100_INST1" },
> +	{ 0x64, "REFERENCE_WINDOW_WIDTH_REF_100_INST1" },
> +	{ 0x68, "FMON_CLK_LAST_COUNT_REF_156" },
> +	{ 0x6c, "REFERENCE_WINDOW_WIDTH_REF_156" },
> +};
> +
>  static struct mlxbf_pmc_context *pmc;
>  
>  /* UUID used to probe ATF service. */
> @@ -1041,6 +1072,9 @@ static const struct mlxbf_pmc_events *mlxbf_pmc_event_list(const char *blk,
>  	} else if (strstr(blk, "llt")) {
>  		events = mlxbf_pmc_llt_events;
>  		*size = ARRAY_SIZE(mlxbf_pmc_llt_events);
> +	} else if (strstr(blk, "clock_measure")) {
> +		events = mlxbf_pmc_clock_events;
> +		*size = ARRAY_SIZE(mlxbf_pmc_clock_events);
>  	} else {
>  		events = NULL;
>  		*size = 0;
> @@ -1477,14 +1511,15 @@ static int mlxbf_pmc_read_event(int blk_num, uint32_t cnt_num, bool is_l3,
>  /* Method to read a register */
>  static int mlxbf_pmc_read_reg(int blk_num, uint32_t offset, uint64_t *result)
>  {
> -	uint32_t ecc_out;
> +	uint32_t reg;

While at it, change to u32.
diff mbox series

Patch

diff --git a/drivers/platform/mellanox/mlxbf-pmc.c b/drivers/platform/mellanox/mlxbf-pmc.c
index 906dfa96f783..e1c0e2f04abb 100644
--- a/drivers/platform/mellanox/mlxbf-pmc.c
+++ b/drivers/platform/mellanox/mlxbf-pmc.c
@@ -865,6 +865,37 @@  static const struct mlxbf_pmc_events mlxbf_pmc_llt_miss_events[] = {
 	{75, "HISTOGRAM_HISTOGRAM_BIN9"},
 };
 
+static const struct mlxbf_pmc_events mlxbf_pmc_clock_events[] = {
+	{ 0x0, "FMON_CLK_LAST_COUNT_PLL_D1_INST0" },
+	{ 0x4, "REFERENCE_WINDOW_WIDTH_PLL_D1_INST0" },
+	{ 0x8, "FMON_CLK_LAST_COUNT_PLL_D1_INST1" },
+	{ 0xc, "REFERENCE_WINDOW_WIDTH_PLL_D1_INST1" },
+	{ 0x10, "FMON_CLK_LAST_COUNT_PLL_G1" },
+	{ 0x14, "REFERENCE_WINDOW_WIDTH_PLL_G1" },
+	{ 0x18, "FMON_CLK_LAST_COUNT_PLL_W1" },
+	{ 0x1c, "REFERENCE_WINDOW_WIDTH_PLL_W1" },
+	{ 0x20, "FMON_CLK_LAST_COUNT_PLL_T1" },
+	{ 0x24, "REFERENCE_WINDOW_WIDTH_PLL_T1" },
+	{ 0x28, "FMON_CLK_LAST_COUNT_PLL_A0" },
+	{ 0x2c, "REFERENCE_WINDOW_WIDTH_PLL_A0" },
+	{ 0x30, "FMON_CLK_LAST_COUNT_PLL_C0" },
+	{ 0x34, "REFERENCE_WINDOW_WIDTH_PLL_C0" },
+	{ 0x38, "FMON_CLK_LAST_COUNT_PLL_N1" },
+	{ 0x3c, "REFERENCE_WINDOW_WIDTH_PLL_N1" },
+	{ 0x40, "FMON_CLK_LAST_COUNT_PLL_I1" },
+	{ 0x44, "REFERENCE_WINDOW_WIDTH_PLL_I1" },
+	{ 0x48, "FMON_CLK_LAST_COUNT_PLL_R1" },
+	{ 0x4c, "REFERENCE_WINDOW_WIDTH_PLL_R1" },
+	{ 0x50, "FMON_CLK_LAST_COUNT_PLL_P1" },
+	{ 0x54, "REFERENCE_WINDOW_WIDTH_PLL_P1" },
+	{ 0x58, "FMON_CLK_LAST_COUNT_REF_100_INST0" },
+	{ 0x5c, "REFERENCE_WINDOW_WIDTH_REF_100_INST0" },
+	{ 0x60, "FMON_CLK_LAST_COUNT_REF_100_INST1" },
+	{ 0x64, "REFERENCE_WINDOW_WIDTH_REF_100_INST1" },
+	{ 0x68, "FMON_CLK_LAST_COUNT_REF_156" },
+	{ 0x6c, "REFERENCE_WINDOW_WIDTH_REF_156" },
+};
+
 static struct mlxbf_pmc_context *pmc;
 
 /* UUID used to probe ATF service. */
@@ -1041,6 +1072,9 @@  static const struct mlxbf_pmc_events *mlxbf_pmc_event_list(const char *blk,
 	} else if (strstr(blk, "llt")) {
 		events = mlxbf_pmc_llt_events;
 		*size = ARRAY_SIZE(mlxbf_pmc_llt_events);
+	} else if (strstr(blk, "clock_measure")) {
+		events = mlxbf_pmc_clock_events;
+		*size = ARRAY_SIZE(mlxbf_pmc_clock_events);
 	} else {
 		events = NULL;
 		*size = 0;
@@ -1477,14 +1511,15 @@  static int mlxbf_pmc_read_event(int blk_num, uint32_t cnt_num, bool is_l3,
 /* Method to read a register */
 static int mlxbf_pmc_read_reg(int blk_num, uint32_t offset, uint64_t *result)
 {
-	uint32_t ecc_out;
+	uint32_t reg;
 
-	if (strstr(pmc->block_name[blk_num], "ecc")) {
+	if ((strstr(pmc->block_name[blk_num], "ecc")) ||
+	    (strstr(pmc->block_name[blk_num], "clock_measure"))) {
 		if (mlxbf_pmc_readl(pmc->block[blk_num].mmio_base + offset,
-				    &ecc_out))
+				    &reg))
 			return -EFAULT;
 
-		*result = ecc_out;
+		*result = reg;
 		return 0;
 	}
 
@@ -1498,6 +1533,9 @@  static int mlxbf_pmc_read_reg(int blk_num, uint32_t offset, uint64_t *result)
 /* Method to write to a register */
 static int mlxbf_pmc_write_reg(int blk_num, uint32_t offset, uint64_t data)
 {
+	if (strstr(pmc->block_name[blk_num], "clock_measure"))
+		return -EINVAL;
+
 	if (strstr(pmc->block_name[blk_num], "ecc")) {
 		return mlxbf_pmc_write(pmc->block[blk_num].mmio_base + offset,
 				       MLXBF_PMC_WRITE_REG_32, data);