| Message ID | c639a1cd1e09c908c44f14d2156b643e577f0831.1696663037.git.unicorn_wang@outlook.com |
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From: Chen Wang <unicornxw@gmail.com>
To: aou@eecs.berkeley.edu, chao.wei@sophgo.com, conor@kernel.org,
devicetree@vger.kernel.org, guoren@kernel.org, jszhang@kernel.org,
krzysztof.kozlowski+dt@linaro.org, linux-kernel@vger.kernel.org,
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xiaoguang.xing@sophgo.com, apatel@ventanamicro.com
Cc: Chen Wang <unicorn_wang@outlook.com>,
Conor Dooley <conor.dooley@microchip.com>
Subject: [PATCH v5 05/10] dt-bindings: interrupt-controller: Add Sophgo SG2042
PLIC
Date: Sat, 7 Oct 2023 15:55:46 +0800
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| Series |
Add Milk-V Pioneer RISC-V board support
|
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Commit Message
Chen Wang
Oct. 7, 2023, 7:55 a.m. UTC
From: Chen Wang <unicorn_wang@outlook.com> Add compatible string for SOPHGO SG2042 plic. Acked-by: Chao Wei <chao.wei@sophgo.com> Reviewed-by: Guo Ren <guoren@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- .../bindings/interrupt-controller/sifive,plic-1.0.0.yaml | 1 + 1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml index dc1f28e55266..16f9c4760c0f 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml @@ -65,6 +65,7 @@ properties: - items: - enum: - allwinner,sun20i-d1-plic + - sophgo,sg2042-plic - thead,th1520-plic - const: thead,c900-plic - items: