Message ID | bea6eb888717e1c0a3efc58761b0e75e4104f737.1667463263.git.Sandor.yu@nxp.com |
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Received: from PAXPR04MB9448.eurprd04.prod.outlook.com (2603:10a6:102:2b1::21) by AM9PR04MB8081.eurprd04.prod.outlook.com (2603:10a6:20b:3e2::5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5791.20; Fri, 4 Nov 2022 06:47:26 +0000 Received: from PAXPR04MB9448.eurprd04.prod.outlook.com ([fe80::88a0:57d8:2a57:3f4f]) by PAXPR04MB9448.eurprd04.prod.outlook.com ([fe80::88a0:57d8:2a57:3f4f%9]) with mapi id 15.20.5791.022; Fri, 4 Nov 2022 06:47:26 +0000 From: Sandor Yu <Sandor.yu@nxp.com> To: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, andrzej.hajda@intel.com, neil.armstrong@linaro.org, robert.foss@linaro.org, Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, kishon@ti.com, vkoul@kernel.org Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, linux-imx@nxp.com, tzimmermann@suse.de, lyude@redhat.com, Sandor.yu@nxp.com, javierm@redhat.com, ville.syrjala@linux.intel.com, sam@ravnborg.org, jani.nikula@intel.com, maxime@cerno.tech, penguin-kernel@I-love.SAKURA.ne.jp, p.yadav@ti.com, oliver.brown@nxp.com Subject: [v2 07/10] dts-bindings: phy: Add Cadence HDP-TX DP PHY bindings Date: Fri, 4 Nov 2022 14:44:57 +0800 Message-Id: <bea6eb888717e1c0a3efc58761b0e75e4104f737.1667463263.git.Sandor.yu@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <cover.1667463263.git.Sandor.yu@nxp.com> References: <cover.1667463263.git.Sandor.yu@nxp.com> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: SG2PR06CA0194.apcprd06.prod.outlook.com (2603:1096:4:1::26) To PAXPR04MB9448.eurprd04.prod.outlook.com (2603:10a6:102:2b1::21) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PAXPR04MB9448:EE_|AM9PR04MB8081:EE_ X-MS-Office365-Filtering-Correlation-Id: 308e741c-a486-4717-3905-08dabe306f0e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Series |
Initial support for Cadence MHDP(HDMI/DP) for i.MX8MQ
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Commit Message
Sandor Yu
Nov. 4, 2022, 6:44 a.m. UTC
Add bindings for Cadence HDP-TX DisplayPort PHY.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
---
.../bindings/phy/phy-cadence-hdptx-dp.yaml | 70 +++++++++++++++++++
1 file changed, 70 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/phy-cadence-hdptx-dp.yaml
Comments
On 04/11/2022 02:44, Sandor Yu wrote: > Add bindings for Cadence HDP-TX DisplayPort PHY. > > Signed-off-by: Sandor Yu <Sandor.yu@nxp.com> > --- > .../bindings/phy/phy-cadence-hdptx-dp.yaml | 70 +++++++++++++++++++ > 1 file changed, 70 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/phy-cadence-hdptx-dp.yaml > > diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-hdptx-dp.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-hdptx-dp.yaml > new file mode 100644 > index 000000000000..ab6f4e25c425 > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/phy-cadence-hdptx-dp.yaml Use filename matching compatible, so cdns,hdptx-dp-phy.yaml > @@ -0,0 +1,70 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/phy/phy-cadence-hdptx-dp.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" Drop quotes from both lines. > + > +title: Cadence HDP(HDMI/DisplayPort) TX PHY for DisplayPort protocol binding Drop binding > + > +description: > + This binding describes the Cadence HDP-TX PHY for DispalyPort protocol. Drop "This binding describes" > + > +maintainers: > + - Sandor Yu <sandor.yu@nxp.com> > + > +properties: > + compatible: > + enum: > + - cdns,hdptx-dp-phy > + > + reg: > + description: > + Offset of Cadence HDPTX APB configuration registers. Same comments as usual. > + > + clocks: > + items: > + description: > + PHY reference clock. Must contain an entry in clock-names. Drop "Must contain an entry in clock-names." > + > + clock-names: > + items: > + - const: refclk > + > + "#phy-cells": > + const: 0 > + > + cdns,num-lanes: > + description: > + Number of lanes. > + $ref: /schemas/types.yaml#/definitions/uint32 > + enum: [1, 2, 3, 4] > + default: 4 > + > + cdns,max-bit-rate: > + description: > + Maximum DisplayPort link bit rate to use, in Mbps > + $ref: /schemas/types.yaml#/definitions/uint32 > + enum: [2160, 2430, 2700, 3240, 4320, 5400] > + default: 5400 > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + - "#phy-cells" > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/phy/phy.h> > + dp_phy: dp_phy@32c00000 { phy (and no underscores in node names) > + compatible = "cdns,hdptx-dp-phy"; > + reg = <0x32c00000 0x100000>; > + #phy-cells = <0>; > + clocks = <&hdmi_phy_27m>; > + clock-names = "refclk"; > + cdns,num-lanes = <4>; > + cdns,max-bit-rate = <5400>; > + }; Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-hdptx-dp.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-hdptx-dp.yaml new file mode 100644 index 000000000000..ab6f4e25c425 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/phy-cadence-hdptx-dp.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/phy/phy-cadence-hdptx-dp.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Cadence HDP(HDMI/DisplayPort) TX PHY for DisplayPort protocol binding + +description: + This binding describes the Cadence HDP-TX PHY for DispalyPort protocol. + +maintainers: + - Sandor Yu <sandor.yu@nxp.com> + +properties: + compatible: + enum: + - cdns,hdptx-dp-phy + + reg: + description: + Offset of Cadence HDPTX APB configuration registers. + + clocks: + items: + description: + PHY reference clock. Must contain an entry in clock-names. + + clock-names: + items: + - const: refclk + + "#phy-cells": + const: 0 + + cdns,num-lanes: + description: + Number of lanes. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [1, 2, 3, 4] + default: 4 + + cdns,max-bit-rate: + description: + Maximum DisplayPort link bit rate to use, in Mbps + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [2160, 2430, 2700, 3240, 4320, 5400] + default: 5400 + +required: + - compatible + - reg + - clocks + - clock-names + - "#phy-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/phy/phy.h> + dp_phy: dp_phy@32c00000 { + compatible = "cdns,hdptx-dp-phy"; + reg = <0x32c00000 0x100000>; + #phy-cells = <0>; + clocks = <&hdmi_phy_27m>; + clock-names = "refclk"; + cdns,num-lanes = <4>; + cdns,max-bit-rate = <5400>; + };