[22/23] arm64: zynqmp: Describe bus-width for SD card on KV260

Message ID b4046d2f593047400c190e438fd9d05128c293d9.1683034376.git.michal.simek@amd.com
State New
Headers
Series arm64: zynqmp: Misc zynqmp changes |

Commit Message

Michal Simek May 2, 2023, 1:35 p.m. UTC
  SD card is connected with 4 data lines which should be described properly.

Signed-off-by: Michal Simek <michal.simek@amd.com>
---

 arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso | 1 +
 arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso | 1 +
 2 files changed, 2 insertions(+)
  

Comments

Michal Simek May 16, 2023, 11:10 a.m. UTC | #1
On 5/2/23 15:35, Michal Simek wrote:
> SD card is connected with 4 data lines which should be described properly.
> 
> Signed-off-by: Michal Simek <michal.simek@amd.com>
> ---
> 
>   arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso | 1 +
>   arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso | 1 +
>   2 files changed, 2 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
> index 776444714fad..dcc51b3adab0 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
> @@ -136,6 +136,7 @@ &sdhci1 { /* on CC with tuned parameters */
>   	disable-wp;
>   	xlnx,mio-bank = <1>;
>   	assigned-clock-rates = <187498123>;
> +	bus-width = <4>;
>   };
>   
>   &gem3 { /* required by spec */
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
> index 78d082a11492..3384df3d5920 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
> @@ -119,6 +119,7 @@ &sdhci1 { /* on CC with tuned parameters */
>   	clk-phase-uhs-sdr25 = <120>, <60>;
>   	clk-phase-uhs-ddr50 = <126>, <48>;
>   	assigned-clock-rates = <187498123>;
> +	bus-width = <4>;
>   };
>   
>   &gem3 { /* required by spec */

Applied.
M
  

Patch

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
index 776444714fad..dcc51b3adab0 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
@@ -136,6 +136,7 @@  &sdhci1 { /* on CC with tuned parameters */
 	disable-wp;
 	xlnx,mio-bank = <1>;
 	assigned-clock-rates = <187498123>;
+	bus-width = <4>;
 };
 
 &gem3 { /* required by spec */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
index 78d082a11492..3384df3d5920 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
@@ -119,6 +119,7 @@  &sdhci1 { /* on CC with tuned parameters */
 	clk-phase-uhs-sdr25 = <120>, <60>;
 	clk-phase-uhs-ddr50 = <126>, <48>;
 	assigned-clock-rates = <187498123>;
+	bus-width = <4>;
 };
 
 &gem3 { /* required by spec */