[v10,032/108] KVM: x86/mmu: Make sync_page not use hard-coded 0 as the initial SPTE value

Message ID adcc3484605cb460a0c00ee5673c83f32a88e6ca.1667110240.git.isaku.yamahata@intel.com
State New
Headers
Series KVM TDX basic feature support |

Commit Message

Isaku Yamahata Oct. 30, 2022, 6:22 a.m. UTC
  From: Isaku Yamahata <isaku.yamahata@intel.com>

FNAME(sync_page) in arch/x86/kvm/mmu/paging_tmpl.h assumes that the initial
shadow page table entry (SPTE) is zero.  Remove the assumption by using
SHADOW_NONPRESENT_VALUE that will be updated from 0 to non-zero value.

Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com>
---
 arch/x86/kvm/mmu/paging_tmpl.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
  

Comments

Kai Huang Nov. 9, 2022, 11:24 a.m. UTC | #1
On Sat, 2022-10-29 at 23:22 -0700, isaku.yamahata@intel.com wrote:
> From: Isaku Yamahata <isaku.yamahata@intel.com>
> 
> FNAME(sync_page) in arch/x86/kvm/mmu/paging_tmpl.h assumes that the initial
> shadow page table entry (SPTE) is zero.  Remove the assumption by using
> SHADOW_NONPRESENT_VALUE that will be updated from 0 to non-zero value.
> 
> Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com>
> ---
>  arch/x86/kvm/mmu/paging_tmpl.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/x86/kvm/mmu/paging_tmpl.h b/arch/x86/kvm/mmu/paging_tmpl.h
> index 5ab5f94dcb6f..6db3f2b5563a 100644
> --- a/arch/x86/kvm/mmu/paging_tmpl.h
> +++ b/arch/x86/kvm/mmu/paging_tmpl.h
> @@ -1036,7 +1036,8 @@ static int FNAME(sync_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
>  		gpa_t pte_gpa;
>  		gfn_t gfn;
>  
> -		if (!sp->spt[i])
> +		/* spt[i] has initial value of shadow page table allocation */
> +		if (sp->spt[i] == SHADOW_NONPRESENT_VALUE)
>  			continue;
>  
>  		pte_gpa = first_pte_gpa + i * sizeof(pt_element_t);

I think this patch can be merged to previous one?  Looks there's no good reason
to keep it as standalone.
  
Isaku Yamahata Nov. 17, 2022, 5:55 p.m. UTC | #2
On Wed, Nov 09, 2022 at 11:24:44AM +0000,
"Huang, Kai" <kai.huang@intel.com> wrote:

> On Sat, 2022-10-29 at 23:22 -0700, isaku.yamahata@intel.com wrote:
> > From: Isaku Yamahata <isaku.yamahata@intel.com>
> > 
> > FNAME(sync_page) in arch/x86/kvm/mmu/paging_tmpl.h assumes that the initial
> > shadow page table entry (SPTE) is zero.  Remove the assumption by using
> > SHADOW_NONPRESENT_VALUE that will be updated from 0 to non-zero value.
> > 
> > Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com>
> > ---
> >  arch/x86/kvm/mmu/paging_tmpl.h | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> > 
> > diff --git a/arch/x86/kvm/mmu/paging_tmpl.h b/arch/x86/kvm/mmu/paging_tmpl.h
> > index 5ab5f94dcb6f..6db3f2b5563a 100644
> > --- a/arch/x86/kvm/mmu/paging_tmpl.h
> > +++ b/arch/x86/kvm/mmu/paging_tmpl.h
> > @@ -1036,7 +1036,8 @@ static int FNAME(sync_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
> >  		gpa_t pte_gpa;
> >  		gfn_t gfn;
> >  
> > -		if (!sp->spt[i])
> > +		/* spt[i] has initial value of shadow page table allocation */
> > +		if (sp->spt[i] == SHADOW_NONPRESENT_VALUE)
> >  			continue;
> >  
> >  		pte_gpa = first_pte_gpa + i * sizeof(pt_element_t);
> 
> I think this patch can be merged to previous one?  Looks there's no good reason
> to keep it as standalone.

Yes, will squash it.
  

Patch

diff --git a/arch/x86/kvm/mmu/paging_tmpl.h b/arch/x86/kvm/mmu/paging_tmpl.h
index 5ab5f94dcb6f..6db3f2b5563a 100644
--- a/arch/x86/kvm/mmu/paging_tmpl.h
+++ b/arch/x86/kvm/mmu/paging_tmpl.h
@@ -1036,7 +1036,8 @@  static int FNAME(sync_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
 		gpa_t pte_gpa;
 		gfn_t gfn;
 
-		if (!sp->spt[i])
+		/* spt[i] has initial value of shadow page table allocation */
+		if (sp->spt[i] == SHADOW_NONPRESENT_VALUE)
 			continue;
 
 		pte_gpa = first_pte_gpa + i * sizeof(pt_element_t);