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Fri, 24 Feb 2023 17:52:32 -0800 Received: from rnnvmail204.nvidia.com (10.129.68.6) by rnnvmail203.nvidia.com (10.129.68.9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Fri, 24 Feb 2023 17:52:31 -0800 Received: from Asurada-Nvidia.nvidia.com (10.127.8.12) by mail.nvidia.com (10.129.68.6) with Microsoft SMTP Server id 15.2.986.36 via Frontend Transport; Fri, 24 Feb 2023 17:52:30 -0800 From: Nicolin Chen To: , , , , , , CC: , , , , , , Subject: [PATCH v3 4/5] iommufd: Add replace support in iommufd_access_set_ioas() Date: Fri, 24 Feb 2023 17:51:41 -0800 Message-ID: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT087:EE_|SJ0PR12MB5501:EE_ X-MS-Office365-Filtering-Correlation-Id: 62057d93-7747-4009-ba4e-08db16d2fbdd X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Hw38iuTUgsLJ8o1q4R7hKbyIjIYMxKEL1VnJuefiqU00u4QffYRBf//UEQ8dfVpr/iMEebN77NLn4hB6dh+w9R6hHnEpo4W3heAEd3/936gJp2ICeOiwna6aRf8v2ktfjLJMHjSp9j4s+EwN5cId+pJiPCKzfYqvCGY/ZzjcUvJ/0ok7IhDc79F2a7lH0p/d0D3noDKJ189FTcphRhyYC8m/EWqJJxGd7G2UrRiN7lq5ZQVYBX0460lua3LKBxFWqqQ3XESOU+w4oUjwx7O+/DpWxTEY52I7X0vLpwjYwwXBEpOEMEUy3H31LhOk8KQ+Llm7scLrfT/yvHCqgXC9oNY7hG9WBLuPMDIVPOVA8yps294DCVznzgchCKTwhRGE6JZ3FpFa4gz0YoeN/HWXomI6jyrbAdqZvcVNQqYmk1OKcCUKOdl91c9qR5I83gBhjklWLErlVljFhen4hS1cmNJ1L8UGwVNgOP0agQ+R9XYhDzwzlaux+fV+f7Lw0/FZ35ygnHs83DnjJ2OI99qhvbzIvWTG0FAnDG7lD24lDY+uh2IsDtNJwdZc6hYVWEvEq0VA2Ow4jsXeEBiMkYYRdAbFZjtiA9aBEiSGDA4487nwzDiBuNChgkjEwGZyw6VcIiOOSNt0A+8qEwu0cmhM8sI0OVe2b/swNLbj7dFa3gXCN6WoO3vPRCsbp38m1lg0m2XNF6CyxGmNoKmNV4QaiZrnSAap72EZR2Kv43tKOpQ= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230025)(4636009)(39860400002)(376002)(396003)(346002)(136003)(451199018)(36840700001)(46966006)(40470700004)(110136005)(2616005)(316002)(82310400005)(86362001)(36756003)(54906003)(40460700003)(26005)(186003)(70206006)(40480700001)(7416002)(36860700001)(2906002)(70586007)(8676002)(41300700001)(47076005)(426003)(6666004)(478600001)(336012)(7696005)(4326008)(356005)(5660300002)(7636003)(34020700004)(82740400003)(8936002)(83380400001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Feb 2023 01:52:42.4956 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 62057d93-7747-4009-ba4e-08db16d2fbdd X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT087.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB5501 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1758766452774396366?= X-GMAIL-MSGID: =?utf-8?q?1758766452774396366?= Support an access->ioas replacement in iommufd_access_set_ioas(), which sets the access->ioas to NULL provisionally so that any further incoming iommufd_access_pin_pages() callback can be blocked. Then, call access->ops->unmap() to clean up the entire iopt. To allow an iommufd_access_unpin_pages() callback to happen via this unmap() call, add an ioas_unpin pointer so the unpin routine won't be affected by the "access->ioas = NULL" trick above. Suggested-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- drivers/iommu/iommufd/device.c | 15 +++++++++++++-- drivers/iommu/iommufd/iommufd_private.h | 1 + 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/iommufd/device.c b/drivers/iommu/iommufd/device.c index a955ebd4bd5d..c44d6e7a2ed7 100644 --- a/drivers/iommu/iommufd/device.c +++ b/drivers/iommu/iommufd/device.c @@ -712,11 +712,22 @@ int iommufd_access_set_ioas(struct iommufd_access *access, u32 ioas_id) iommufd_ref_to_users(obj); } + /* + * Set ioas to NULL to block any further iommufd_access_pin_pages(). + * iommufd_access_unpin_pages() can continue using access->ioas_unpin. + */ + access->ioas = NULL; + + mutex_unlock(&access->ioas_lock); + access->ops->unmap(access->data, 0, ULONG_MAX); + mutex_lock(&access->ioas_lock); + if (cur_ioas) { iopt_remove_access(&cur_ioas->iopt, access); refcount_dec(&cur_ioas->obj.users); } + access->ioas_unpin = new_ioas; access->ioas = new_ioas; mutex_unlock(&access->ioas_lock); @@ -790,11 +801,11 @@ void iommufd_access_unpin_pages(struct iommufd_access *access, return; mutex_lock(&access->ioas_lock); - if (!access->ioas) { + if (!access->ioas_unpin) { mutex_unlock(&access->ioas_lock); return; } - iopt = &access->ioas->iopt; + iopt = &access->ioas_unpin->iopt; down_read(&iopt->iova_rwsem); iopt_for_each_contig_area(&iter, area, iopt, iova, last_iova) diff --git a/drivers/iommu/iommufd/iommufd_private.h b/drivers/iommu/iommufd/iommufd_private.h index 94e88377a7fc..44e77ea9c399 100644 --- a/drivers/iommu/iommufd/iommufd_private.h +++ b/drivers/iommu/iommufd/iommufd_private.h @@ -311,6 +311,7 @@ struct iommufd_access { struct iommufd_object obj; struct iommufd_ctx *ictx; struct iommufd_ioas *ioas; + struct iommufd_ioas *ioas_unpin; struct mutex ioas_lock; const struct iommufd_access_ops *ops; void *data;