Message ID | ZFEzmA/0whRO6IFv@fedora |
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[62.78.225.252]) by smtp.gmail.com with ESMTPSA id q8-20020ac25a08000000b004ecb06acbb3sm5401968lfn.281.2023.05.02.09.00.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 May 2023 09:00:37 -0700 (PDT) Date: Tue, 2 May 2023 19:00:24 +0300 From: Matti Vaittinen <mazziesaccount@gmail.com> To: Matti Vaittinen <mazziesaccount@gmail.com>, Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Cc: Matti Vaittinen <mazziesaccount@gmail.com>, Jonathan Cameron <jic23@kernel.org>, Lars-Peter Clausen <lars@metafoo.de>, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] iio: bu27034: Ensure reset is written Message-ID: <ZFEzmA/0whRO6IFv@fedora> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="dohUr8GHFqpjSqLp" Content-Disposition: inline X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764800821290368691?= X-GMAIL-MSGID: =?utf-8?q?1764800821290368691?= |
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iio: bu27034: Ensure reset is written
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Commit Message
Matti Vaittinen
May 2, 2023, 4 p.m. UTC
The reset bit must be always written to the hardware no matter what value is in a cache or register. Ensure this by using regmap_write_bits() instead of the regmap_update_bits(). Furthermore, the RESET bit may be self-clearing, so mark the SYSTEM_CONTROL register volatile to guarantee we do also read the right state - should we ever need to read it. Signed-off by: Matti Vaittinen <mazziesaccount@gmail.com> Fixes: e52afbd61039 ("iio: light: ROHM BU27034 Ambient Light Sensor") --- I haven't verified if the reset bit is self-clearin as I did temporarily give away the HW. In worst case the bit is not self clearing - but we don't really get performance penalty even if we set the register volatile because the SYSTEM_CONTROL register only has the part-ID and the reset fields. The part-ID is only read once at probe. --- drivers/iio/light/rohm-bu27034.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) base-commit: 7fcbd72176076c44b47e8f68f0223c02c411f420
Comments
On 5/2/23 19:00, Matti Vaittinen wrote: > The reset bit must be always written to the hardware no matter what value > is in a cache or register. Ensure this by using regmap_write_bits() > instead of the regmap_update_bits(). Furthermore, the RESET bit may be > self-clearing, so mark the SYSTEM_CONTROL register volatile to guarantee > we do also read the right state - should we ever need to read it. > > Signed-off by: Matti Vaittinen <mazziesaccount@gmail.com> I misspelled the Signed-off-by. Sorry folks. I'll re-spin. Yours, -- Matti -- Matti Vaittinen Linux kernel developer at ROHM Semiconductors Oulu Finland ~~ When things go utterly wrong vim users can always type :help! ~~
diff --git a/drivers/iio/light/rohm-bu27034.c b/drivers/iio/light/rohm-bu27034.c index 25c9b79574a5..740ebd86b6e5 100644 --- a/drivers/iio/light/rohm-bu27034.c +++ b/drivers/iio/light/rohm-bu27034.c @@ -231,6 +231,9 @@ struct bu27034_result { static const struct regmap_range bu27034_volatile_ranges[] = { { + .range_min = BU27034_REG_SYSTEM_CONTROL, + .range_max = BU27034_REG_SYSTEM_CONTROL, + }, { .range_min = BU27034_REG_MODE_CONTROL4, .range_max = BU27034_REG_MODE_CONTROL4, }, { @@ -1272,7 +1275,7 @@ static int bu27034_chip_init(struct bu27034_data *data) int ret, sel; /* Reset */ - ret = regmap_update_bits(data->regmap, BU27034_REG_SYSTEM_CONTROL, + ret = regmap_write_bits(data->regmap, BU27034_REG_SYSTEM_CONTROL, BU27034_MASK_SW_RESET, BU27034_MASK_SW_RESET); if (ret) return dev_err_probe(data->dev, ret, "Sensor reset failed\n");