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Wed, 18 Oct 2023 11:32:22 +0000 Received: from IA1PR20MB4953.namprd20.prod.outlook.com ([fe80::d050:882f:a8a7:8263]) by IA1PR20MB4953.namprd20.prod.outlook.com ([fe80::d050:882f:a8a7:8263%5]) with mapi id 15.20.6907.021; Wed, 18 Oct 2023 11:32:22 +0000 From: Inochi Amaoto To: Chao Wei , Chen Wang , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou Cc: Inochi Amaoto , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 5/8] riscv: dts: sophgo: Separate compatible specific for cv1800b soc Date: Wed, 18 Oct 2023 19:31:50 +0800 Message-ID: X-Mailer: git-send-email 2.42.0 In-Reply-To: References: X-TMN: [EjQgZEOU/j4VUvAYZvAPKdn56N7v/XjSF7FucMAFRSQ=] X-ClientProxiedBy: SG2PR04CA0173.apcprd04.prod.outlook.com (2603:1096:4::35) To IA1PR20MB4953.namprd20.prod.outlook.com (2603:10b6:208:3af::19) X-Microsoft-Original-Message-ID: <20231018113155.1605537-5-inochiama@outlook.com> MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: IA1PR20MB4953:EE_|CH0PR20MB4059:EE_ X-MS-Office365-Filtering-Correlation-Id: 525c3de9-ad43-43ea-9aba-08dbcfcde4f0 X-Microsoft-Antispam: BCL:0; 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Wed, 18 Oct 2023 04:32:42 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780092779903103651 X-GMAIL-MSGID: 1780092779903103651 Move the cv1800b soc specific compatible out of the common file. Signed-off-by: Inochi Amaoto --- arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 18 ++++++++++++++++++ arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 3 --- 2 files changed, 18 insertions(+), 3 deletions(-) create mode 100644 arch/riscv/boot/dts/sophgo/cv1800b.dtsi -- 2.42.0 diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi new file mode 100644 index 000000000000..165e9e320a8c --- /dev/null +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2023 Jisheng Zhang + */ + +#include "cv18xx.dtsi" + +/ { + compatible = "sophgo,cv1800b"; +}; + +&plic { + compatible = "sophgo,cv1800b-plic", "thead,c900-plic"; +}; + +&clint { + compatible = "sophgo,cv1800b-clint", "thead,c900-clint"; +}; diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi index df40e87ee063..55d4bc84faa0 100644 --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi @@ -6,7 +6,6 @@ #include / { - compatible = "sophgo,cv1800b"; #address-cells = <1>; #size-cells = <1>; @@ -105,7 +104,6 @@ uart4: serial@41c0000 { }; plic: interrupt-controller@70000000 { - compatible = "sophgo,cv1800b-plic", "thead,c900-plic"; reg = <0x70000000 0x4000000>; interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>; interrupt-controller; @@ -115,7 +113,6 @@ plic: interrupt-controller@70000000 { }; clint: timer@74000000 { - compatible = "sophgo,cv1800b-clint", "thead,c900-clint"; reg = <0x74000000 0x10000>; interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>; };