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Wed, 19 Jul 2023 01:57:34 -0500 From: Sandipan Das To: , , CC: , , , , , , , , , , , , , , , , , Subject: [PATCH 4/6] perf/x86/amd/uncore: Add group exclusivity Date: Wed, 19 Jul 2023 12:25:39 +0530 Message-ID: <92465f174413553410aaa876223817b156808800.1689748843.git.sandipan.das@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT065:EE_|PH0PR12MB5433:EE_ X-MS-Office365-Filtering-Correlation-Id: 21d6f756-a901-416f-58e4-08db88257ae3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: NDg8xIlRxe+wzbLHOvVSxiekiA3qN+JP9EAk0DKC9hL6JAQM74InQxspJh00UgfFmZkWONbupzDK5MGx4C7NlDZNiKXve28RJe+CUWNN6ceds0XtarE7peAW9vwjuLktiM5AOSMl5HxXmfd8m6s9hMNHMuZBB0wxI9hneVcxY1jIBm68yW17zFs/MCYpsXkNKq+WILma1bUSKMqnUmVtwQVY57dnz448oHLMvOLT0rLI7ZJ9Mj/s8HZgnJEl43IHB8hI5Xx08JxaEzDg6V0NMwdFNt109O4R3h6b2Il++pwgdO79q5GJ+I0nHh2yU1JZGUpj8pBm8WemrzrBth7NW/LEg7Nc46YMwCuUTgP7BUOVjaG0hHbkWHDHU2CH+bM7sFagAuMLhQrycVamMiT0gtDfJyhOu29UNZGxei9YKV/mrHgxZ0Ogx3IZ96Fe5dEQ8HUzS1XtVDipxZkW3IWfmA08dDMpQ7kv9CT7v8PpnUs8Yf+5iJhOoiRZThAwa0e5E8friXahvDVUH991uAuNvq543sEeciSOguOxH8rAuWrSSdi7V3ZLabOH0lkZ4LXYDK5udNOvxz5miK72635UxSpt36/LNyIn6AfHMqOFjnHG+9rjPJgc1RABkNkeZ9OOA8VktHGRe8sguS/r3pu3N9k2awwfwYgf4wOXIuE8ugNtIX4pBYmbn8XNQJAWgV2bJ1A9QlXCJRL7zp53LJemxBXymVEhSVDInZdangP9tJo6O9I49tB4hLZ7q3M3YOPzHpJdQE9W0jefWhxkKk6EDA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(346002)(39860400002)(376002)(136003)(396003)(82310400008)(451199021)(46966006)(40470700004)(36840700001)(44832011)(478600001)(110136005)(54906003)(36860700001)(2616005)(83380400001)(426003)(47076005)(40460700003)(86362001)(36756003)(40480700001)(2906002)(70586007)(186003)(336012)(16526019)(26005)(356005)(82740400003)(81166007)(4326008)(70206006)(316002)(41300700001)(5660300002)(7416002)(8936002)(8676002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Jul 2023 06:57:55.9475 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 21d6f756-a901-416f-58e4-08db88257ae3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT065.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB5433 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1771832723676820167 X-GMAIL-MSGID: 1771832723676820167 In some cases, it may be necessary to restrict opening PMU events to a subset of CPUs. Uncore PMUs which require this restriction can use the new group attribute in struct amd_uncore to set a valid uncore ID during initialization. In the starting phase of hotplug, the per-CPU context will be marked as unused if the ID in group does not match the uncore ID for the CPU that is being onlined. E.g. the Zen 4 memory controller (UMC) PMUs are specific to each active memory channel and the MSR address space for the PERF_CTL and PERF_CTR registers is reused on each socket. Thus, PMU events corresponding to a memory controller should only be opened on CPUs belonging to the socket associated with that memory controller. Signed-off-by: Sandipan Das --- arch/x86/events/amd/uncore.c | 23 +++++++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c index f17df6574ba5..6653e8e164bd 100644 --- a/arch/x86/events/amd/uncore.c +++ b/arch/x86/events/amd/uncore.c @@ -50,6 +50,7 @@ struct amd_uncore { int num_counters; int rdpmc_base; u32 msr_base; + int group; cpumask_t active_mask; struct pmu pmu; struct amd_uncore_ctx * __percpu *ctx; @@ -423,6 +424,17 @@ static int amd_uncore_cpu_starting(unsigned int cpu) uncore = &uncores[i]; ctx = *per_cpu_ptr(uncore->ctx, cpu); ctx->id = uncore->id(cpu); + + /* + * Reclaim the context if events can only be opened by CPUs + * within the same group + */ + if (uncore->group >= 0 && ctx->id != uncore->group) { + hlist_add_head(&ctx->node, &uncore_unused_list); + *per_cpu_ptr(uncore->ctx, cpu) = NULL; + continue; + } + ctx = amd_uncore_find_online_sibling(ctx, uncore); *per_cpu_ptr(uncore->ctx, cpu) = ctx; } @@ -453,7 +465,7 @@ static int amd_uncore_cpu_online(unsigned int cpu) for (i = 0; i < num_uncores; i++) { uncore = &uncores[i]; ctx = *per_cpu_ptr(uncore->ctx, cpu); - if (cpu == ctx->cpu) + if (ctx && cpu == ctx->cpu) cpumask_set_cpu(cpu, &uncore->active_mask); } @@ -469,12 +481,14 @@ static int amd_uncore_cpu_down_prepare(unsigned int cpu) for (i = 0; i < num_uncores; i++) { uncore = &uncores[i]; this = *per_cpu_ptr(uncore->ctx, cpu); + if (!this) + continue; /* this cpu is going down, migrate to a shared sibling if possible */ for_each_online_cpu(j) { that = *per_cpu_ptr(uncore->ctx, j); - if (cpu == j) + if (!that || cpu == j) continue; if (this == that) { @@ -499,6 +513,9 @@ static int amd_uncore_cpu_dead(unsigned int cpu) for (i = 0; i < num_uncores; i++) { uncore = &uncores[i]; ctx = *per_cpu_ptr(uncore->ctx, cpu); + if (!ctx) + continue; + if (cpu == ctx->cpu) cpumask_clear_cpu(cpu, &uncore->active_mask); @@ -584,6 +601,7 @@ static int amd_uncore_df_init(void) uncore->msr_base = MSR_F15H_NB_PERF_CTL; uncore->rdpmc_base = RDPMC_BASE_NB; uncore->id = amd_uncore_df_id; + uncore->group = -1; if (pmu_version >= 2) { *df_attr++ = &format_attr_event14v2.attr; @@ -693,6 +711,7 @@ static int amd_uncore_l3_init(void) uncore->msr_base = MSR_F16H_L2I_PERF_CTL; uncore->rdpmc_base = RDPMC_BASE_LLC; uncore->id = amd_uncore_l3_id; + uncore->group = -1; if (boot_cpu_data.x86 >= 0x17) { *l3_attr++ = &format_attr_event8.attr;