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[2620:137:e000::1:20]) by mx.google.com with ESMTP id g4-20020a1709065d0400b0086f3e470d23si569564ejt.723.2023.01.14.13.53.54; Sat, 14 Jan 2023 13:54:18 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@mailo.com header.s=mailo header.b=XhaDOnDI; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mailo.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230525AbjANVV5 (ORCPT + 99 others); Sat, 14 Jan 2023 16:21:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51496 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230513AbjANVVs (ORCPT ); Sat, 14 Jan 2023 16:21:48 -0500 Received: from msg-4.mailo.com (msg-4.mailo.com [213.182.54.15]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E9B6F59C3 for ; Sat, 14 Jan 2023 13:21:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=mailo.com; s=mailo; t=1673731300; bh=EkdauZCzQ1cK93hqglTGGg1XeEnBheNqHiWtPXNdtH8=; h=X-EA-Auth:Date:From:To:Cc:Subject:Message-ID:References: MIME-Version:Content-Type:In-Reply-To; b=XhaDOnDIboT6HCOBi1Ymfsr1Y6Thl/XtXDfsJo0awOhjDpzE0YGLvpx7PZv9j6ILh F7ssoq7ABRMbWJVVbK+jNVcpD92miRRgcBenViQa/EDXB0PMgu5ElN5Liur2opihuC /l8bLK4o8/Qadrmo97MrkgVISH/z0KdN0C8yDL+E= Received: by b-1.in.mailobj.net [192.168.90.11] with ESMTP via ip-206.mailobj.net [213.182.55.206] Sat, 14 Jan 2023 22:21:40 +0100 (CET) X-EA-Auth: wo+VQO9ffl4BHSNsx5JlMnia2RZdbHBhkeMPohaTckEHMhLVrBSduq54Ewvo2nRbQ50i0bdeCxQfsQUaF/76y+PJLAqy/qhx Date: Sun, 15 Jan 2023 02:51:35 +0530 From: Deepak R Varma To: Harry Wentland , Leo Li , Rodrigo Siqueira , Alex Deucher , Christian =?iso-8859-1?q?K=F6nig?= , "Pan, Xinhui" , David Airlie , Daniel Vetter , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Cc: Saurabh Singh Sengar , Praveen Kumar Subject: [PATCH 4/4] drm/amd/display: dcn32: Use min()/max() helper macros Message-ID: <85526bdbb34b6f9bff0118170578cea29755354d.1673730293.git.drv@mailo.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1755036524696562750?= X-GMAIL-MSGID: =?utf-8?q?1755036524696562750?= Use the standard min() / max() helper macros instead of direct variable comparison using if/else blocks or ternary operator. Change identified using minmax.cocci Coccinelle semantic patch. Signed-off-by: Deepak R Varma --- drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c index f94abd124021..80820f012891 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c @@ -908,7 +908,7 @@ static bool subvp_drr_schedulable(struct dc *dc, struct dc_state *context, struc stretched_drr_us = drr_frame_us + mall_region_us + SUBVP_DRR_MARGIN_US; drr_stretched_vblank_us = (drr_timing->v_total - drr_timing->v_addressable) * drr_timing->h_total / (double)(drr_timing->pix_clk_100hz * 100) * 1000000 + (stretched_drr_us - drr_frame_us); - max_vblank_mallregion = drr_stretched_vblank_us > mall_region_us ? drr_stretched_vblank_us : mall_region_us; + max_vblank_mallregion = max(drr_stretched_vblank_us, mall_region_us); /* We consider SubVP + DRR schedulable if the stretched frame duration of the DRR display (i.e. the * highest refresh rate + margin that can support UCLK P-State switch) passes the static analysis @@ -999,7 +999,7 @@ static bool subvp_vblank_schedulable(struct dc *dc, struct dc_state *context) (double)(vblank_timing->pix_clk_100hz * 100) * 1000000; subvp_active_us = main_timing->v_addressable * main_timing->h_total / (double)(main_timing->pix_clk_100hz * 100) * 1000000; - max_vblank_mallregion = vblank_blank_us > mall_region_us ? vblank_blank_us : mall_region_us; + max_vblank_mallregion = max(vblank_blank_us, mall_region_us); // Schedulable if VACTIVE region of the SubVP pipe can fit the MALL prefetch, VBLANK frame time, // and the max of (VBLANK blanking time, MALL region)