Commit Message
Isaku Yamahata
Feb. 26, 2024, 8:25 a.m. UTC
From: Isaku Yamahata <isaku.yamahata@intel.com> TDX wants to know the faulting address is shared or private so that the max level is limited by Secure-EPT or not. Because fault->gfn doesn't include shared bit, gfn doesn't tell if the faulting address is shared or not. Pass is_private for TDX case. TDX logic will be if (!is_private) return 0; else return PG_LEVEL_4K. Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> --- arch/x86/include/asm/kvm_host.h | 3 ++- arch/x86/kvm/mmu/mmu.c | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index d15f5b4b1656..57ce89fc2740 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -1797,7 +1797,8 @@ struct kvm_x86_ops { gva_t (*get_untagged_addr)(struct kvm_vcpu *vcpu, gva_t gva, unsigned int flags); - int (*gmem_max_level)(struct kvm *kvm, kvm_pfn_t pfn, gfn_t gfn, u8 *max_level); + int (*gmem_max_level)(struct kvm *kvm, kvm_pfn_t pfn, gfn_t gfn, + bool is_private, u8 *max_level); }; struct kvm_x86_nested_ops { diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c index 1e5e12d2707d..22db1a9f528a 100644 --- a/arch/x86/kvm/mmu/mmu.c +++ b/arch/x86/kvm/mmu/mmu.c @@ -4324,7 +4324,8 @@ static int kvm_faultin_pfn_private(struct kvm_vcpu *vcpu, max_level = kvm_max_level_for_order(max_order); r = static_call(kvm_x86_gmem_max_level)(vcpu->kvm, fault->pfn, - fault->gfn, &max_level); + fault->gfn, fault->is_private, + &max_level); if (r) { kvm_release_pfn_clean(fault->pfn); return r;