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[2620:137:e000::1:20]) by mx.google.com with ESMTP id w187-20020a627bc4000000b0065304909e29si1690526pfc.187.2023.06.08.19.25.02; Thu, 08 Jun 2023 19:25:17 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@intel.com header.s=Intel header.b=hiXVagbN; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238271AbjFICJE (ORCPT + 99 others); Thu, 8 Jun 2023 22:09:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33360 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230126AbjFICJC (ORCPT ); Thu, 8 Jun 2023 22:09:02 -0400 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BCE483A94; Thu, 8 Jun 2023 19:08:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1686276510; x=1717812510; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=EulOffrCSj4eOemj+Y35+bpErgFuZayXZ81lRq+53/o=; b=hiXVagbNeYBTi1wYoSc/+pT77N2Vj3UIESxBZVyqxgrEXMjXe9w23T5G amEyGTlP7t4qCGu5RGZgASK+cLgU+Y0ISUnlCr2yDMzb5MMNvyQmUilpZ SPz5YQK32tqrKuXvxGIJSDGwR/EJROF7YjjtXIB9EugohCQ9QFgI67pCD X6EvPmWrbgo4g91hTq74nD6i/mUjdWJapAi7IGiCiqWLBP5nOwcqGD16s aSNeCGrQk6BBfQ9eM4b+ypih/FQFdp0q5GRihny2hEP8JwNQXmjqTwdky RbkZ9i7o3J4tiTgJCEJVLhUscaweYshEIaXgVeqFn4JB7djPZJ6R0UVpJ g==; X-IronPort-AV: E=McAfee;i="6600,9927,10735"; a="359975744" X-IronPort-AV: E=Sophos;i="6.00,228,1681196400"; d="scan'208";a="359975744" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jun 2023 19:08:18 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10735"; a="713334947" X-IronPort-AV: E=Sophos;i="6.00,228,1681196400"; d="scan'208";a="713334947" Received: from haibo-optiplex-7090.sh.intel.com ([10.239.159.132]) by fmsmga007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jun 2023 19:08:11 -0700 From: Haibo Xu Cc: xiaobo55x@gmail.com, haibo1.xu@intel.com, ajones@ventanamicro.com, maz@kernel.org, oliver.upton@linux.dev, seanjc@google.com, Paolo Bonzini , Jonathan Corbet , Anup Patel , Atish Patra , Paul Walmsley , Palmer Dabbelt , Albert Ou , Shuah Khan , James Morse , Suzuki K Poulose , Zenghui Yu , David Matlack , Ben Gardon , Vipin Sharma , Colton Lewis , kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev Subject: [PATCH v3 09/10] KVM: riscv: selftests: Skip some registers set operation Date: Fri, 9 Jun 2023 10:12:17 +0800 Message-Id: <73045958d9ab71d5266d012f1e13061afa8c5331.1686275310.git.haibo1.xu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768190133848909988?= X-GMAIL-MSGID: =?utf-8?q?1768190133848909988?= Set operation on some riscv registers(mostly pesudo ones) was not supported and should be skipped in the get-reg-list test. Just reuse the rejects_set utilities to handle it in riscv. Signed-off-by: Haibo Xu Reviewed-by: Andrew Jones --- tools/testing/selftests/kvm/get-reg-list.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/tools/testing/selftests/kvm/get-reg-list.c b/tools/testing/selftests/kvm/get-reg-list.c index c4bd5a5259da..abacb95c21c6 100644 --- a/tools/testing/selftests/kvm/get-reg-list.c +++ b/tools/testing/selftests/kvm/get-reg-list.c @@ -211,16 +211,22 @@ static void run_test(struct vcpu_reg_list *c) ++failed_get; } - /* rejects_set registers are rejected after KVM_ARM_VCPU_FINALIZE */ + /* + * rejects_set registers are rejected after KVM_ARM_VCPU_FINALIZE on aarch64, + * or registers that should skip set operation on riscv. + */ for_each_sublist(c, s) { if (s->rejects_set && find_reg(s->rejects_set, s->rejects_set_n, reg.id)) { reject_reg = true; - ret = __vcpu_ioctl(vcpu, KVM_SET_ONE_REG, ®); - if (ret != -1 || errno != EPERM) { - printf("%s: Failed to reject (ret=%d, errno=%d) ", config_name(c), ret, errno); - print_reg(config_name(c), reg.id); - putchar('\n'); - ++failed_reject; + if ((reg.id & KVM_REG_ARCH_MASK) == KVM_REG_ARM64) { + ret = __vcpu_ioctl(vcpu, KVM_SET_ONE_REG, ®); + if (ret != -1 || errno != EPERM) { + printf("%s: Failed to reject (ret=%d, errno=%d) ", + config_name(c), ret, errno); + print_reg(config_name(c), reg.id); + putchar('\n'); + ++failed_reject; + } } break; }