ARM: zynq: dts: Add SCL & SDA GPIO entries for recovery

Message ID 5eb73d1150648e782795e35c30fccb983b3e0db7.1683035557.git.michal.simek@amd.com
State New
Headers
Series ARM: zynq: dts: Add SCL & SDA GPIO entries for recovery |

Commit Message

Michal Simek May 2, 2023, 1:52 p.m. UTC
  From: Chirag Parekh <chiragp@xilinx.com>

Wire i2c pinmuxing gpio recovery for zc702.

Signed-off-by: Chirag Parekh <chiragp@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
---

 arch/arm/boot/dts/zynq-zc702.dts | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)
  

Comments

Michal Simek May 16, 2023, 11:13 a.m. UTC | #1
On 5/2/23 15:52, Michal Simek wrote:
> From: Chirag Parekh <chiragp@xilinx.com>
> 
> Wire i2c pinmuxing gpio recovery for zc702.
> 
> Signed-off-by: Chirag Parekh <chiragp@xilinx.com>
> Signed-off-by: Michal Simek <michal.simek@amd.com>
> ---
> 
>   arch/arm/boot/dts/zynq-zc702.dts | 19 ++++++++++++++++++-
>   1 file changed, 18 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts
> index d23201ba8cd7..6efdbca9d3ef 100644
> --- a/arch/arm/boot/dts/zynq-zc702.dts
> +++ b/arch/arm/boot/dts/zynq-zc702.dts
> @@ -5,6 +5,7 @@
>    */
>   /dts-v1/;
>   #include "zynq-7000.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
>   
>   / {
>   	model = "Xilinx ZC702 board";
> @@ -106,8 +107,11 @@ &gpio0 {
>   &i2c0 {
>   	status = "okay";
>   	clock-frequency = <400000>;
> -	pinctrl-names = "default";
> +	pinctrl-names = "default", "gpio";
>   	pinctrl-0 = <&pinctrl_i2c0_default>;
> +	pinctrl-1 = <&pinctrl_i2c0_gpio>;
> +	scl-gpios = <&gpio0 50 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> +	sda-gpios = <&gpio0 51 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
>   
>   	i2c-mux@74 {
>   		compatible = "nxp,pca9548";
> @@ -298,6 +302,19 @@ conf {
>   		};
>   	};
>   
> +	pinctrl_i2c0_gpio: i2c0-gpio {
> +		mux {
> +			groups = "gpio0_50_grp", "gpio0_51_grp";
> +			function = "gpio0";
> +		};
> +
> +		conf {
> +			groups = "gpio0_50_grp", "gpio0_51_grp";
> +			slew-rate = <0>;
> +			io-standard = <1>;
> +		};
> +	};
> +
>   	pinctrl_sdhci0_default: sdhci0-default {
>   		mux {
>   			groups = "sdio0_2_grp";

Applied.
M
  

Patch

diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts
index d23201ba8cd7..6efdbca9d3ef 100644
--- a/arch/arm/boot/dts/zynq-zc702.dts
+++ b/arch/arm/boot/dts/zynq-zc702.dts
@@ -5,6 +5,7 @@ 
  */
 /dts-v1/;
 #include "zynq-7000.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 
 / {
 	model = "Xilinx ZC702 board";
@@ -106,8 +107,11 @@  &gpio0 {
 &i2c0 {
 	status = "okay";
 	clock-frequency = <400000>;
-	pinctrl-names = "default";
+	pinctrl-names = "default", "gpio";
 	pinctrl-0 = <&pinctrl_i2c0_default>;
+	pinctrl-1 = <&pinctrl_i2c0_gpio>;
+	scl-gpios = <&gpio0 50 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+	sda-gpios = <&gpio0 51 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 
 	i2c-mux@74 {
 		compatible = "nxp,pca9548";
@@ -298,6 +302,19 @@  conf {
 		};
 	};
 
+	pinctrl_i2c0_gpio: i2c0-gpio {
+		mux {
+			groups = "gpio0_50_grp", "gpio0_51_grp";
+			function = "gpio0";
+		};
+
+		conf {
+			groups = "gpio0_50_grp", "gpio0_51_grp";
+			slew-rate = <0>;
+			io-standard = <1>;
+		};
+	};
+
 	pinctrl_sdhci0_default: sdhci0-default {
 		mux {
 			groups = "sdio0_2_grp";