From patchwork Tue Nov 14 17:04:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Golle X-Patchwork-Id: 165023 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:6358:a59:b0:164:83eb:24d7 with SMTP id 25csp2065582rwb; Tue, 14 Nov 2023 09:05:42 -0800 (PST) X-Google-Smtp-Source: AGHT+IGONYlUgONT6684Z73CGWABj0QdFHl8442y7aVBz/KdqJqT7uY5bMXJmZfu3IJJcYxRHBHI X-Received: by 2002:a05:6a20:1447:b0:17e:2afd:407f with SMTP id a7-20020a056a20144700b0017e2afd407fmr13496048pzi.9.1699981542670; Tue, 14 Nov 2023 09:05:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699981542; cv=none; d=google.com; s=arc-20160816; b=LAGs1uwYNGropnhiW2wTfQjUxcO1FvvKUdSxBOqQqt5JkmIDSR4k7esoBUpJu3RT3t NqQReaRjKGj3z961B49CDUrE6L7834LT+VlTBGE+gbESBmftZ70BG8nL+ccikqyABEcc f9eQFekwunPO1WkrD9P9xxSAwwJE+W8CFTApG2dRZ59FGMMrdSfSNwkZ+G/Q/dPtJ+tp t6g2m91ce2Xt+gDrWu9RzO9et5OOR3enpvy8chdpK8bbLBJQoNjvPEf9VD7R4IC/GRZw 8aZMKuxcnVz6tXKyceNIu3WefNIo7NQwkeUMVvv6OFJMt3/UVbaAYF1QBQtAgzC780z0 qnAg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:to:from:date; bh=OOUfLqvsFeBiDS2V8KZea+Jq9YDVa2LG3oSyoC/hJBA=; fh=xEaS6JsnxjZX8pVPVpj87OJgkNID0y6bqQ3crE1r+UM=; b=Q3mgSdM/t8G1q6k0+HffqNTUHyLt26vGOCo8tkuom1PJiHVlxRWBcaUWdN3LGzCJME nmHRX8zQsS5G2MMfHNwLLeEbGxBNiIGH05SRjC912yIliQpxV/ACdomx9VJFzTwXkiwa 2hzUTS9OCiyStQ1++9nRfgQlCaKZpKgqvod4OT7oyZGDLlQx4GiEe0dQapRc5ZAIwT8T A6DV2kzp8aDpq4B1wpDl6xHS4MkES5cK0MOOeZ82Yzuie4ypgWTsWVyO1+HWHAe8y8Oa GcEP5Nq2XjhL10TS1o8spSDWe79E76NWxiELj7DnqFEijbKnUiLtRgXGMkM5tJH6XC+F yvFw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from agentk.vger.email (agentk.vger.email. [2620:137:e000::3:2]) by mx.google.com with ESMTPS id f21-20020a056a00239500b006c0fe409cafsi8408097pfc.153.2023.11.14.09.05.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Nov 2023 09:05:42 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) client-ip=2620:137:e000::3:2; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id 230D180BB3E8; Tue, 14 Nov 2023 09:05:28 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233753AbjKNRFB (ORCPT + 29 others); Tue, 14 Nov 2023 12:05:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42498 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233510AbjKNRE7 (ORCPT ); Tue, 14 Nov 2023 12:04:59 -0500 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6862711D; Tue, 14 Nov 2023 09:04:56 -0800 (PST) Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.96.2) (envelope-from ) id 1r2wqH-0000hY-1n; Tue, 14 Nov 2023 17:04:49 +0000 Date: Tue, 14 Nov 2023 17:04:46 +0000 From: Daniel Golle To: Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 2/2] watchdog: mediatek: mt7988: add wdt support Message-ID: <3f5ed9656ea66637d259e9771ed852511369ba9b.1699980962.git.daniel@makrotopia.org> References: <4d7db8786dce35273db516f3d41228bc27a08fe9.1699980962.git.daniel@makrotopia.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <4d7db8786dce35273db516f3d41228bc27a08fe9.1699980962.git.daniel@makrotopia.org> X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Tue, 14 Nov 2023 09:05:28 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782559845978073834 X-GMAIL-MSGID: 1782559845978073834 Add support for watchdog and reset generator unit of the MediaTek MT7988 SoC. Signed-off-by: Daniel Golle --- v3: fix wrong function parameter name in kernel-doc comment v2: call new toprgu_reset_sw_en_unlocked from toprgu_reset_update while holding lock. drivers/watchdog/mtk_wdt.c | 40 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c index b2330b16b497a..3b4ee7185feed 100644 --- a/drivers/watchdog/mtk_wdt.c +++ b/drivers/watchdog/mtk_wdt.c @@ -58,6 +58,8 @@ #define WDT_SWSYSRST 0x18U #define WDT_SWSYS_RST_KEY 0x88000000 +#define WDT_SWSYSRST_EN 0xfc + #define DRV_NAME "mtk-wdt" #define DRV_VERSION "1.0" @@ -71,10 +73,12 @@ struct mtk_wdt_dev { struct reset_controller_dev rcdev; bool disable_wdt_extrst; bool reset_by_toprgu; + bool has_swsysrst_en; }; struct mtk_wdt_data { int toprgu_sw_rst_num; + bool has_swsysrst_en; }; static const struct mtk_wdt_data mt2712_data = { @@ -89,6 +93,11 @@ static const struct mtk_wdt_data mt7986_data = { .toprgu_sw_rst_num = MT7986_TOPRGU_SW_RST_NUM, }; +static const struct mtk_wdt_data mt7988_data = { + .toprgu_sw_rst_num = 24, + .has_swsysrst_en = true, +}; + static const struct mtk_wdt_data mt8183_data = { .toprgu_sw_rst_num = MT8183_TOPRGU_SW_RST_NUM, }; @@ -109,6 +118,28 @@ static const struct mtk_wdt_data mt8195_data = { .toprgu_sw_rst_num = MT8195_TOPRGU_SW_RST_NUM, }; +/** + * toprgu_reset_sw_en_unlocked() - enable/disable software control for reset bit + * @data: Pointer to instance of driver data. + * @id: Bit number identifying the reset to be enabled or disabled. + * @enable: If true, enable software control for that bit, disable otherwise. + * + * Context: The caller must hold lock of struct mtk_wdt_dev. + */ +static void toprgu_reset_sw_en_unlocked(struct mtk_wdt_dev *data, + unsigned long id, bool enable) +{ + u32 tmp; + + tmp = readl(data->wdt_base + WDT_SWSYSRST_EN); + if (enable) + tmp |= BIT(id); + else + tmp &= ~BIT(id); + + writel(tmp, data->wdt_base + WDT_SWSYSRST_EN); +} + static int toprgu_reset_update(struct reset_controller_dev *rcdev, unsigned long id, bool assert) { @@ -119,6 +150,9 @@ static int toprgu_reset_update(struct reset_controller_dev *rcdev, spin_lock_irqsave(&data->lock, flags); + if (assert && data->has_swsysrst_en) + toprgu_reset_sw_en_unlocked(data, id, true); + tmp = readl(data->wdt_base + WDT_SWSYSRST); if (assert) tmp |= BIT(id); @@ -127,6 +161,9 @@ static int toprgu_reset_update(struct reset_controller_dev *rcdev, tmp |= WDT_SWSYS_RST_KEY; writel(tmp, data->wdt_base + WDT_SWSYSRST); + if (!assert && data->has_swsysrst_en) + toprgu_reset_sw_en_unlocked(data, id, false); + spin_unlock_irqrestore(&data->lock, flags); return 0; @@ -406,6 +443,8 @@ static int mtk_wdt_probe(struct platform_device *pdev) wdt_data->toprgu_sw_rst_num); if (err) return err; + + mtk_wdt->has_swsysrst_en = wdt_data->has_swsysrst_en; } mtk_wdt->disable_wdt_extrst = @@ -444,6 +483,7 @@ static const struct of_device_id mtk_wdt_dt_ids[] = { { .compatible = "mediatek,mt6589-wdt" }, { .compatible = "mediatek,mt6795-wdt", .data = &mt6795_data }, { .compatible = "mediatek,mt7986-wdt", .data = &mt7986_data }, + { .compatible = "mediatek,mt7988-wdt", .data = &mt7988_data }, { .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data }, { .compatible = "mediatek,mt8186-wdt", .data = &mt8186_data }, { .compatible = "mediatek,mt8188-wdt", .data = &mt8188_data },