Message ID | 379f79687ca4a7d0394a04d14fb3890ce257e706.1706256158.git.esben@geanix.com |
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State | New |
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Miller" <davem@davemloft.net>, Eric Dumazet <edumazet@google.com>, Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>, Shawn Guo <shawnguo@kernel.org>, Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix Kernel Team <kernel@pengutronix.de>, Fabio Estevam <festevam@gmail.com>, NXP Linux Team <linux-imx@nxp.com>, Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Rohan G Thomas <rohan.g.thomas@intel.com>, "Abhishek Chauhan (ABC)" <quic_abchauha@quicinc.com>, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/2] net: stmmac: dwmac-imx: set TSO/TBS TX queues default settings Date: Fri, 26 Jan 2024 10:10:42 +0100 Message-ID: <379f79687ca4a7d0394a04d14fb3890ce257e706.1706256158.git.esben@geanix.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <cover.1706256158.git.esben@geanix.com> References: <cover.1706256158.git.esben@geanix.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Authenticated-Sender: esben@geanix.com X-Virus-Scanned: Clear (ClamAV 0.103.10/27165/Thu Jan 25 10:51:15 2024) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789147242808009045 X-GMAIL-MSGID: 1789147242808009045 |
Series |
net: stmmac: dwmac-imx: Time Based Scheduling support
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Commit Message
Esben Haabendal
Jan. 26, 2024, 9:10 a.m. UTC
TSO and TBS cannot coexist. For now we set i.MX Ethernet QOS controller to
use the first TX queue with TSO and the rest for TBS.
TX queues with TBS can support etf qdisc hw offload.
Signed-off-by: Esben Haabendal <esben@geanix.com>
---
drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c | 4 ++++
1 file changed, 4 insertions(+)
Comments
On Fri Jan 26 2024, Esben Haabendal wrote: > TSO and TBS cannot coexist. For now we set i.MX Ethernet QOS controller to > use the first TX queue with TSO and the rest for TBS. > > TX queues with TBS can support etf qdisc hw offload. > > Signed-off-by: Esben Haabendal <esben@geanix.com> Thanks for fixing this, Reviewed-by: Kurt Kanzenbach <kurt@linutronix.de>
On 26/01/2024 09:10, Esben Haabendal wrote: > TSO and TBS cannot coexist. For now we set i.MX Ethernet QOS controller to > use the first TX queue with TSO and the rest for TBS. > > TX queues with TBS can support etf qdisc hw offload. > > Signed-off-by: Esben Haabendal <esben@geanix.com> > --- > drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c > index 8f730ada71f9..6b65420e11b5 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c > +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c > @@ -353,6 +353,10 @@ static int imx_dwmac_probe(struct platform_device *pdev) > if (data->flags & STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY) > plat_dat->flags |= STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY; > > + /* Default TX Q0 to use TSO and rest TXQ for TBS */ > + for (int i = 1; i < plat_dat->tx_queues_to_use; i++) > + plat_dat->tx_queues_cfg[i].tbs_en = 1; > + > plat_dat->host_dma_width = dwmac->ops->addr_width; > plat_dat->init = imx_dwmac_init; > plat_dat->exit = imx_dwmac_exit; Reviewed-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c index 8f730ada71f9..6b65420e11b5 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c @@ -353,6 +353,10 @@ static int imx_dwmac_probe(struct platform_device *pdev) if (data->flags & STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY) plat_dat->flags |= STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY; + /* Default TX Q0 to use TSO and rest TXQ for TBS */ + for (int i = 1; i < plat_dat->tx_queues_to_use; i++) + plat_dat->tx_queues_cfg[i].tbs_en = 1; + plat_dat->host_dma_width = dwmac->ops->addr_width; plat_dat->init = imx_dwmac_init; plat_dat->exit = imx_dwmac_exit;