diff mbox series

[5/8] tools/power x86_energy_perf_policy: add nominal and lowest nonlinear perf values showing support

Message ID 31bb6289418648cdc29b175fe81a55e63c0ea64a.1706583551.git.perry.yuan@amd.com
State New
Headers
Series enable x86_energy_perf_policy for AMD CPU |

Commit Message

Yuan, Perry Jan. 30, 2024, 3:18 a.m. UTC 
  Add nominal_perf and lowest_nonlinear_perf read and print the values. It
will help user to check each core all perf values of CPPC and change the
EPP profile as need.

cpu0: [AMD HWP_CAP]: low 12 lowest_non 86 nominal 121 highest 196
cpu1: [AMD HWP_CAP]: low 12 lowest_non 86 nominal 121 highest 176
cpu2: [AMD HWP_CAP]: low 12 lowest_non 86 nominal 121 highest 201
cpu3: [AMD HWP_CAP]: low 12 lowest_non 86 nominal 121 highest 181

Signed-off-by: Perry Yuan <perry.yuan@amd.com>
---
 .../x86_energy_perf_policy/x86_energy_perf_policy.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
index a08403ab219a..7bc668d22728 100644
--- a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
+++ b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
@@ -38,6 +38,8 @@  struct msr_hwp_cap {
 	unsigned char guaranteed;
 	unsigned char efficient;
 	unsigned char lowest;
+	unsigned char nominal_perf;
+	unsigned char lowest_nonlinear_perf;
 };
 
 struct msr_hwp_request {
@@ -820,8 +822,13 @@  void print_hwp_cap(int cpu, struct msr_hwp_cap *cap, char *str)
 	if (cpu != -1)
 		printf("cpu%d: ", cpu);
 
-	printf("HWP_CAP: low %d eff %d guar %d high %d\n",
-		cap->lowest, cap->efficient, cap->guaranteed, cap->highest);
+	if (genuine_intel) {
+		printf("HWP_CAP: low %d eff %d guar %d high %d\n",
+			cap->lowest, cap->efficient, cap->guaranteed, cap->highest);
+	} else if (authentic_amd) {
+		printf("[AMD HWP_CAP]: low %d lowest_non %d nominal %d highest %d\n\n",
+			cap->lowest, cap->lowest_nonlinear_perf, cap->nominal_perf, cap->highest);
+	}
 }
 void read_hwp_cap(int cpu, struct msr_hwp_cap *cap, unsigned int msr_offset)
 {
@@ -840,6 +847,8 @@  void read_hwp_cap(int cpu, struct msr_hwp_cap *cap, unsigned int msr_offset)
 			errx(-1, "failed to get msr with return %d", ret);
 		cap->highest = msr_perf_2_ratio(AMD_CPPC_HIGHEST_PERF(msr));
 		cap->lowest = msr_perf_2_ratio(AMD_CPPC_LOWEST_PERF(msr));
+		cap->nominal_perf = msr_perf_2_ratio(AMD_CPPC_NOMINAL_PERF(msr));
+		cap->lowest_nonlinear_perf = msr_perf_2_ratio(AMD_CPPC_LOWNONLIN_PERF(msr));
 	}
 }