@@ -125,6 +125,52 @@ def AmdBr():
description="breakdown of retired branch instructions")
+def AmdItlb():
+ l2h = Event("bp_l1_tlb_miss_l2_tlb_hit", "bp_l1_tlb_miss_l2_hit")
+ l2m = Event("l2_itlb_misses")
+ l2r = l2h + l2m
+
+ itlb_l1_mg = None
+ l1m = l2r
+ if zen_model <= 3:
+ l1r = Event("ic_fw32")
+ l1h = max(l1r - l1m, 0)
+ itlb_l1_mg = MetricGroup("itlb_l1", [
+ Metric("itlb_l1_hits",
+ "L1 ITLB hits as a perecentage of L1 ITLB accesses.",
+ d_ratio(l1h, l1h + l1m), "100%"),
+ Metric("itlb_l1_miss",
+ "L1 ITLB misses as a perecentage of L1 ITLB accesses.",
+ d_ratio(l1m, l1h + l1m), "100%"),
+ Metric("itlb_l1_reqs",
+ "The number of 32B fetch windows transferred from IC pipe to DE "
+ "instruction decoder per second.", d_ratio(l1r, interval_sec),
+ "windows/sec"),
+ ])
+
+ return MetricGroup("itlb", [
+ MetricGroup("itlb_ov", [
+ Metric("itlb_ov_insn_bt_l1_miss",
+ "Number of instructions between l1 misses", d_ratio(
+ ins, l1m), "insns"),
+ Metric("itlb_ov_insn_bt_l2_miss",
+ "Number of instructions between l2 misses", d_ratio(
+ ins, l2m), "insns"),
+ ]),
+ itlb_l1_mg,
+ MetricGroup("itlb_l2", [
+ Metric("itlb_l2_hits",
+ "L2 ITLB hits as a percentage of all L2 ITLB accesses.",
+ d_ratio(l2h, l2r), "100%"),
+ Metric("itlb_l2_miss",
+ "L2 ITLB misses as a percentage of all L2 ITLB accesses.",
+ d_ratio(l2m, l2r), "100%"),
+ Metric("itlb_l2_reqs", "ITLB accesses per second.",
+ d_ratio(l2r, interval_sec), "accesses/sec"),
+ ]),
+ ], description="Instruction TLB breakdown")
+
+
def AmdHwpf():
"""Returns a MetricGroup representing AMD hardware prefetch metrics."""
if zen_model <= 1:
@@ -316,6 +362,7 @@ def Rapl() -> MetricGroup:
all_metrics = MetricGroup("", [
AmdBr(),
+ AmdItlb(),
AmdHwpf(),
AmdSwpf(),
AmdUpc(),