| Message ID | 20240301101547.2136948-1-mstrozek@opensource.cirrus.com |
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From: Maciej Strozek <mstrozek@opensource.cirrus.com>
To: Lee Jones <lee@kernel.org>
CC: <alsa-devel@alsa-project.org>, <patches@opensource.cirrus.com>,
<linux-kernel@vger.kernel.org>, <linux-sound@vger.kernel.org>,
Maciej Strozek
<mstrozek@opensource.cirrus.com>
Subject: [PATCH] mfd: cs42l43: Fix wrong GPIO_FN_SEL and SPI_CLK_CONFIG1
defaults
Date: Fri, 1 Mar 2024 10:15:47 +0000
Message-ID: <20240301101547.2136948-1-mstrozek@opensource.cirrus.com>
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mfd: cs42l43: Fix wrong GPIO_FN_SEL and SPI_CLK_CONFIG1 defaults
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|
Commit Message
Maciej Strozek
March 1, 2024, 10:15 a.m. UTC
Two regs have wrong values in existing fields, change them to match
the datasheet.
Fixes: ace6d1448138 ("mfd: cs42l43: Add support for cs42l43 core driver")
Signed-off-by: Maciej Strozek <mstrozek@opensource.cirrus.com>
---
drivers/mfd/cs42l43.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--
2.30.2
Comments
On Fri, Mar 01, 2024 at 10:15:47AM +0000, Maciej Strozek wrote: > Two regs have wrong values in existing fields, change them to match > the datasheet. > > Fixes: ace6d1448138 ("mfd: cs42l43: Add support for cs42l43 core driver") > > Signed-off-by: Maciej Strozek <mstrozek@opensource.cirrus.com> > --- Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com> Thanks, Charles
diff --git a/drivers/mfd/cs42l43.c b/drivers/mfd/cs42l43.c index 73c88ee6a866..1cea3f8f467d 100644 --- a/drivers/mfd/cs42l43.c +++ b/drivers/mfd/cs42l43.c @@ -84,7 +84,7 @@ const struct reg_default cs42l43_reg_default[CS42L43_N_DEFAULTS] = { { CS42L43_DRV_CTRL_5, 0x136C00C0 }, { CS42L43_GPIO_CTRL1, 0x00000707 }, { CS42L43_GPIO_CTRL2, 0x00000000 }, - { CS42L43_GPIO_FN_SEL, 0x00000000 }, + { CS42L43_GPIO_FN_SEL, 0x00000004 }, { CS42L43_MCLK_SRC_SEL, 0x00000000 }, { CS42L43_SAMPLE_RATE1, 0x00000003 }, { CS42L43_SAMPLE_RATE2, 0x00000003 }, @@ -217,7 +217,7 @@ const struct reg_default cs42l43_reg_default[CS42L43_N_DEFAULTS] = { { CS42L43_CTRL_REG, 0x00000006 }, { CS42L43_FDIV_FRAC, 0x40000000 }, { CS42L43_CAL_RATIO, 0x00000080 }, - { CS42L43_SPI_CLK_CONFIG1, 0x00000000 }, + { CS42L43_SPI_CLK_CONFIG1, 0x00000001 }, { CS42L43_SPI_CONFIG1, 0x00000000 }, { CS42L43_SPI_CONFIG2, 0x00000000 }, { CS42L43_SPI_CONFIG3, 0x00000001 },