[v4] clk: zynq: Prevent null pointer dereference caused by kmalloc failure
Commit Message
The kmalloc() in zynq_clk_setup() will return null if the
physical memory has run out. As a result, if we use snprintf()
to write data to the null address, the null pointer dereference
bug will happen.
This patch uses a stack variable to replace the kmalloc().
Fixes: 0ee52b157b8e ("clk: zynq: Add clock controller driver")
Suggested-by: Michal Simek <michal.simek@amd.com>
Suggested-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Duoming Zhou <duoming@zju.edu.cn>
---
drivers/clk/zynq/clkc.c | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
Comments
On 3/1/24 09:44, Duoming Zhou wrote:
> The kmalloc() in zynq_clk_setup() will return null if the
> physical memory has run out. As a result, if we use snprintf()
> to write data to the null address, the null pointer dereference
> bug will happen.
>
> This patch uses a stack variable to replace the kmalloc().
>
> Fixes: 0ee52b157b8e ("clk: zynq: Add clock controller driver")
> Suggested-by: Michal Simek <michal.simek@amd.com>
> Suggested-by: Stephen Boyd <sboyd@kernel.org>
> Signed-off-by: Duoming Zhou <duoming@zju.edu.cn>
> ---
> drivers/clk/zynq/clkc.c | 8 +++-----
> 1 file changed, 3 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/clk/zynq/clkc.c b/drivers/clk/zynq/clkc.c
> index 7bdeaff2bfd..c28d3dacf0f 100644
> --- a/drivers/clk/zynq/clkc.c
> +++ b/drivers/clk/zynq/clkc.c
> @@ -42,6 +42,7 @@ static void __iomem *zynq_clkc_base;
> #define SLCR_SWDT_CLK_SEL (zynq_clkc_base + 0x204)
>
> #define NUM_MIO_PINS 54
> +#define CLK_NAME_LEN 16
>
> #define DBG_CLK_CTRL_CLKACT_TRC BIT(0)
> #define DBG_CLK_CTRL_CPU_1XCLKACT BIT(1)
> @@ -215,7 +216,7 @@ static void __init zynq_clk_setup(struct device_node *np)
> int i;
> u32 tmp;
> int ret;
> - char *clk_name;
> + char clk_name[CLK_NAME_LEN];
> unsigned int fclk_enable = 0;
> const char *clk_output_name[clk_max];
> const char *cpu_parents[4];
> @@ -426,12 +427,10 @@ static void __init zynq_clk_setup(struct device_node *np)
> "gem1_emio_mux", CLK_SET_RATE_PARENT,
> SLCR_GEM1_CLK_CTRL, 0, 0, &gem1clk_lock);
>
> - tmp = strlen("mio_clk_00x");
> - clk_name = kmalloc(tmp, GFP_KERNEL);
> for (i = 0; i < NUM_MIO_PINS; i++) {
> int idx;
>
> - snprintf(clk_name, tmp, "mio_clk_%2.2d", i);
> + snprintf(clk_name, CLK_NAME_LEN, "mio_clk_%2.2d", i);
> idx = of_property_match_string(np, "clock-names", clk_name);
> if (idx >= 0)
> can_mio_mux_parents[i] = of_clk_get_parent_name(np,
> @@ -439,7 +438,6 @@ static void __init zynq_clk_setup(struct device_node *np)
> else
> can_mio_mux_parents[i] = dummy_nm;
> }
> - kfree(clk_name);
> clk_register_mux(NULL, "can_mux", periph_parents, 4,
> CLK_SET_RATE_NO_REPARENT, SLCR_CAN_CLK_CTRL, 4, 2, 0,
> &canclk_lock);
Acked-by: Michal Simek <michal.simek@amd.com>
Thanks,
Michal
@@ -42,6 +42,7 @@ static void __iomem *zynq_clkc_base;
#define SLCR_SWDT_CLK_SEL (zynq_clkc_base + 0x204)
#define NUM_MIO_PINS 54
+#define CLK_NAME_LEN 16
#define DBG_CLK_CTRL_CLKACT_TRC BIT(0)
#define DBG_CLK_CTRL_CPU_1XCLKACT BIT(1)
@@ -215,7 +216,7 @@ static void __init zynq_clk_setup(struct device_node *np)
int i;
u32 tmp;
int ret;
- char *clk_name;
+ char clk_name[CLK_NAME_LEN];
unsigned int fclk_enable = 0;
const char *clk_output_name[clk_max];
const char *cpu_parents[4];
@@ -426,12 +427,10 @@ static void __init zynq_clk_setup(struct device_node *np)
"gem1_emio_mux", CLK_SET_RATE_PARENT,
SLCR_GEM1_CLK_CTRL, 0, 0, &gem1clk_lock);
- tmp = strlen("mio_clk_00x");
- clk_name = kmalloc(tmp, GFP_KERNEL);
for (i = 0; i < NUM_MIO_PINS; i++) {
int idx;
- snprintf(clk_name, tmp, "mio_clk_%2.2d", i);
+ snprintf(clk_name, CLK_NAME_LEN, "mio_clk_%2.2d", i);
idx = of_property_match_string(np, "clock-names", clk_name);
if (idx >= 0)
can_mio_mux_parents[i] = of_clk_get_parent_name(np,
@@ -439,7 +438,6 @@ static void __init zynq_clk_setup(struct device_node *np)
else
can_mio_mux_parents[i] = dummy_nm;
}
- kfree(clk_name);
clk_register_mux(NULL, "can_mux", periph_parents, 4,
CLK_SET_RATE_NO_REPARENT, SLCR_CAN_CLK_CTRL, 4, 2, 0,
&canclk_lock);