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c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709310144; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=RkkcturGDH6iyLvdo+o7gBVlQfQ+pKB/Y+IIwDxn5RM=; b=ip/Kh/hXjeY72FVe0TeYzjJ2O2LSj1I69GBRNbGEi+RtCiBv/ik8jiaRd1d6C6lMR+f8It kEM5Ht2+cyU0iUyzq3IuF8lfwnbrIL7KF4SXYNpmPIG797Vi24wWQxpRQK68JjKvP+ynf3 MyCakcFuFs7pr97ToVkdgBts+Yoj5+7i0NY6JxFdkn/oUwRhnHw5EUTbQogJns2QJStlpy xkfLjLEnW1fyL7ejgZEWnmcXv7SAnazwIB0nHX4gOZAivoR3att3Gp++AlMXCMBx7hF4cN UiqTMIop7wvnRtCYyPM4BFQsaVZh7B6IDz8I/8tFBTcWVxAs4uZYW2nzYN4wQA== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Fri, 01 Mar 2024 17:22:21 +0100 Subject: [PATCH v9 8/9] MIPS: mobileye: eyeq5: add OLB reset controller node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240301-mbly-clk-v9-8-cbf06eb88708@bootlin.com> References: <20240301-mbly-clk-v9-0-cbf06eb88708@bootlin.com> In-Reply-To: <20240301-mbly-clk-v9-0-cbf06eb88708@bootlin.com> To: Gregory CLEMENT , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thomas Bogendoerfer , Linus Walleij , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Philipp Zabel Cc: Vladimir Kondratiev , linux-mips@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Thomas Petazzoni , Tawfik Bayouk , linux-gpio@vger.kernel.org, =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1792341754520563180 X-GMAIL-MSGID: 1792341754520563180 Add the devicetree node for the reset controller on the Mobileye EyeQ5 platform. It appears as a subnode to the OLB syscon as its registers are located in this shared register region. Add reset phandles to UART nodes. Signed-off-by: Théo Lebrun --- arch/mips/boot/dts/mobileye/eyeq5.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/mips/boot/dts/mobileye/eyeq5.dtsi b/arch/mips/boot/dts/mobileye/eyeq5.dtsi index 1a65b43e13b1..76935f237ab5 100644 --- a/arch/mips/boot/dts/mobileye/eyeq5.dtsi +++ b/arch/mips/boot/dts/mobileye/eyeq5.dtsi @@ -78,6 +78,7 @@ uart0: serial@800000 { interrupts = ; clocks = <&uart_clk>, <&occ_periph>; clock-names = "uartclk", "apb_pclk"; + resets = <&reset 0 10>; }; uart1: serial@900000 { @@ -88,6 +89,7 @@ uart1: serial@900000 { interrupts = ; clocks = <&uart_clk>, <&occ_periph>; clock-names = "uartclk", "apb_pclk"; + resets = <&reset 0 11>; }; uart2: serial@a00000 { @@ -98,6 +100,7 @@ uart2: serial@a00000 { interrupts = ; clocks = <&uart_clk>, <&occ_periph>; clock-names = "uartclk", "apb_pclk"; + resets = <&reset 0 12>; }; olb: system-controller@e00000 { @@ -107,6 +110,13 @@ olb: system-controller@e00000 { #address-cells = <1>; #size-cells = <1>; + reset: reset-controller@e00000 { + compatible = "mobileye,eyeq5-reset"; + reg = <0x000 0x0c>, <0x200 0x34>, <0x120 0x04>; + reg-names = "d0", "d1", "d2"; + #reset-cells = <2>; + }; + clocks: clock-controller@e0002c { compatible = "mobileye,eyeq5-clk"; reg = <0x02c 0x50>, <0x11c 0x04>;