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AJvYcCX6ZkA2Cu1XbqnDl5KFg+tdSKhg32sHAt9t6aTUj+u0lMPO9Hg0VzuiMpwCRc8ylIMWUnTCcXeI9pRYqPtZiCF5avI4pfp5KonpJbOC X-Gm-Message-State: AOJu0YwdMTujcqL0VekFk8fZyIMXjHwl6Z8s8y/dVhSh4EKw0KT+6NGZ +c+iVIAFz2ua1vtDHR9P7hACunPdkz940YiTQtZ9Po5JJX2yhqxth4uCkaw/CUa2bavDa9jeHmN 4IpQjlA== X-Received: from irogers.svl.corp.google.com ([2620:15c:2a3:200:77dc:144c:334e:e2dd]) (user=irogers job=sendgmr) by 2002:a81:9b4c:0:b0:609:51a3:b409 with SMTP id s73-20020a819b4c000000b0060951a3b409mr147135ywg.0.1709165943906; Wed, 28 Feb 2024 16:19:03 -0800 (PST) Date: Wed, 28 Feb 2024 16:18:02 -0800 In-Reply-To: <20240229001806.4158429-1-irogers@google.com> Message-Id: <20240229001806.4158429-18-irogers@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20240229001806.4158429-1-irogers@google.com> X-Mailer: git-send-email 2.44.0.278.ge034bb2e1d-goog Subject: [PATCH v1 17/20] perf jevents: Add dir breakdown metrics for Intel From: Ian Rogers To: Perry Taylor , Samantha Alt , Caleb Biggers , Weilin Wang , Edward Baker , Andi Kleen , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , John Garry , Kan Liang , Jing Zhang , Thomas Richter , James Clark , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Stephane Eranian X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1792190844140078546 X-GMAIL-MSGID: 1792190844140078546 Breakdown directory hit, misses and requests. The implementation uses the M2M and CHA PMUs present in server models broadwellde, broadwellx cascadelakex, emeraldrapids, icelakex, sapphirerapids and skylakex. Signed-off-by: Ian Rogers --- tools/perf/pmu-events/intel_metrics.py | 36 ++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/tools/perf/pmu-events/intel_metrics.py b/tools/perf/pmu-events/intel_metrics.py index 82fd23cf5500..07aafdf77f79 100755 --- a/tools/perf/pmu-events/intel_metrics.py +++ b/tools/perf/pmu-events/intel_metrics.py @@ -800,6 +800,41 @@ def IntelLdSt() -> Optional[MetricGroup]: ], description = "Breakdown of load/store instructions") +def UncoreDir() -> Optional[MetricGroup]: + try: + m2m_upd = Event("UNC_M2M_DIRECTORY_UPDATE.ANY") + m2m_hits = Event("UNC_M2M_DIRECTORY_HIT.DIRTY_I") + # Turn the umask into a ANY rather than DIRTY_I filter. + m2m_hits.name += "/umask=0xFF,name=UNC_M2M_DIRECTORY_HIT.ANY/" + m2m_miss = Event("UNC_M2M_DIRECTORY_MISS.DIRTY_I") + # Turn the umask into a ANY rather than DIRTY_I filter. + m2m_miss.name += "/umask=0xFF,name=UNC_M2M_DIRECTORY_MISS.ANY/" + cha_upd = Event("UNC_CHA_DIR_UPDATE.HA") + # Turn the umask into a ANY rather than HA filter. + cha_upd.name += "/umask=3,name=UNC_CHA_DIR_UPDATE.ANY/" + except: + return None + + m2m_total = m2m_hits + m2m_miss + upd = m2m_upd + cha_upd # in cache lines + upd_r = upd / interval_sec + look_r = m2m_total / interval_sec + + scale = 64 / 1_000_000 # Cache lines to MB + return MetricGroup("dir", [ + Metric("dir_lookup_rate", "", + d_ratio(m2m_total, interval_sec), "requests/s"), + Metric("dir_lookup_hits", "", + d_ratio(m2m_hits, m2m_total), "100%"), + Metric("dir_lookup_misses", "", + d_ratio(m2m_miss, m2m_total), "100%"), + Metric("dir_update_requests", "", + d_ratio(m2m_upd + cha_upd, interval_sec), "requests/s"), + Metric("dir_update_bw", "", + d_ratio(m2m_upd + cha_upd, interval_sec), f"{scale}MB/s"), + ]) + + def UncoreMem() -> Optional[MetricGroup]: try: loc_rds = Event("UNC_CHA_REQUESTS.READS_LOCAL", "UNC_H_REQUESTS.READS_LOCAL") @@ -902,6 +937,7 @@ all_metrics = MetricGroup("", [ IntelMlp(), IntelPorts(), IntelSwpf(), + UncoreDir(), UncoreMem(), UncoreMemBw(), ])