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AJvYcCXu3P8s3Exg+3quWFhDQ7AheRJWSTe2aDx0qCLmpRp01QbR9qHZ2ANoORjXcWeeMOAokavO4056u84mNn2SmPbXz71wEET6flplf75y X-Gm-Message-State: AOJu0YwtpmK61dQxsTGIpQLIdYYV3chtv5aZdFoj2ISmnL1hzMEKDZ3r uPrsNfOZ9Wj/RjA1ztLt9lPsOi2MRQlkfifBuiUFVFvo4mAh6r0IxxKfwDXSFzxGXFNrLnJ4tSL zp5Nkcw== X-Received: from irogers.svl.corp.google.com ([2620:15c:2a3:200:77dc:144c:334e:e2dd]) (user=irogers job=sendgmr) by 2002:a05:690c:360a:b0:609:6150:da22 with SMTP id ft10-20020a05690c360a00b006096150da22mr77628ywb.1.1709165758889; Wed, 28 Feb 2024 16:15:58 -0800 (PST) Date: Wed, 28 Feb 2024 16:15:31 -0800 In-Reply-To: <20240229001537.4158049-1-irogers@google.com> Message-Id: <20240229001537.4158049-8-irogers@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20240229001537.4158049-1-irogers@google.com> X-Mailer: git-send-email 2.44.0.278.ge034bb2e1d-goog Subject: [PATCH v1 07/13] perf jevents: Add itlb metric group for AMD From: Ian Rogers To: Sandipan Das , Ravi Bangoria , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , John Garry , Kan Liang , Jing Zhang , Thomas Richter , James Clark , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Stephane Eranian X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1792190308353556416 X-GMAIL-MSGID: 1792190308353556416 Add metrics that give an overview and details of the l1 itlb (zen1, zen2, zen3) and l2 itlb (all zens). Signed-off-by: Ian Rogers --- tools/perf/pmu-events/amd_metrics.py | 47 ++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/tools/perf/pmu-events/amd_metrics.py b/tools/perf/pmu-events/amd_metrics.py index dda904998269..82aab39c2a50 100755 --- a/tools/perf/pmu-events/amd_metrics.py +++ b/tools/perf/pmu-events/amd_metrics.py @@ -125,6 +125,52 @@ def AmdBr(): description="breakdown of retired branch instructions") +def AmdItlb(): + l2h = Event("bp_l1_tlb_miss_l2_tlb_hit", "bp_l1_tlb_miss_l2_hit") + l2m = Event("l2_itlb_misses") + l2r = l2h + l2m + + itlb_l1_mg = None + l1m = l2r + if zen_model <= 3: + l1r = Event("ic_fw32") + l1h = max(l1r - l1m, 0) + itlb_l1_mg = MetricGroup("itlb_l1", [ + Metric("itlb_l1_hits", + "L1 ITLB hits as a perecentage of L1 ITLB accesses.", + d_ratio(l1h, l1h + l1m), "100%"), + Metric("itlb_l1_miss", + "L1 ITLB misses as a perecentage of L1 ITLB accesses.", + d_ratio(l1m, l1h + l1m), "100%"), + Metric("itlb_l1_reqs", + "The number of 32B fetch windows transferred from IC pipe to DE " + "instruction decoder per second.", d_ratio(l1r, interval_sec), + "windows/sec"), + ]) + + return MetricGroup("itlb", [ + MetricGroup("itlb_ov", [ + Metric("itlb_ov_insn_bt_l1_miss", + "Number of instructions between l1 misses", d_ratio( + ins, l1m), "insns"), + Metric("itlb_ov_insn_bt_l2_miss", + "Number of instructions between l2 misses", d_ratio( + ins, l2m), "insns"), + ]), + itlb_l1_mg, + MetricGroup("itlb_l2", [ + Metric("itlb_l2_hits", + "L2 ITLB hits as a percentage of all L2 ITLB accesses.", + d_ratio(l2h, l2r), "100%"), + Metric("itlb_l2_miss", + "L2 ITLB misses as a percentage of all L2 ITLB accesses.", + d_ratio(l2m, l2r), "100%"), + Metric("itlb_l2_reqs", "ITLB accesses per second.", + d_ratio(l2r, interval_sec), "accesses/sec"), + ]), + ], description="Instruction TLB breakdown") + + def AmdHwpf(): """Returns a MetricGroup representing AMD hardware prefetch metrics.""" if zen_model <= 1: @@ -316,6 +362,7 @@ def Rapl() -> MetricGroup: all_metrics = MetricGroup("", [ AmdBr(), + AmdItlb(), AmdHwpf(), AmdSwpf(), AmdUpc(),