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b=H4sIAOqv4GUC/x2NwQqDMBAFf0X23IUYom36K8VD0r7ogo2yEWkR/ 72hl4G5zBxUoIJC9+YgxS5FllylvTT0nEIewfKqTtZYZ6z1HB2nRXnv2XN49x1HhHHGOocvY5u gGRsrSqXxt2SvLsXUdlSDqyLJ5z97DOf5A+0w5wt8AAAA To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: srk@ti.com, s-vadapalli@ti.com, r-gunasekaran@ti.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=2613; i=rogerq@kernel.org; h=from:subject:message-id; bh=4V6OlYJLg2D2ADjTGoW0ZIdepDQib6cN9BnQe1KUkgs=; b=owEBbQKS/ZANAwAIAdJaa9O+djCTAcsmYgBl4K/5VGgg0Szc8M2O7/ORpqD/Is7v/MAK0hNAO yZN9iblCjmJAjMEAAEIAB0WIQRBIWXUTJ9SeA+rEFjSWmvTvnYwkwUCZeCv+QAKCRDSWmvTvnYw kzl2D/9BPFAtmkgiacpXSs1V3058PyDLc+ehcKlCemroF4/f1teoqbZVV617xHmdgtCQgmlstNC JBAlD2bzSDeM3X+Lb5/6X1bVqDripAj6Co8mhJAE9BumkI0Vdi2kVel/H+tqQkwlCnzOHYT/Gfj 9sYYYXxP+IBJSkIqTw+QzLNqD24ya0wDNEj4LrYeqoBqsslyDKNN/tc4qyi6dWx0MH940sg2PUX qi/1pBxm7Cj0t5ddFkOeI7T2wsyGWfV2LrnnBSKvx0tht9DV0R1oWlPqL131uIv6oMpfuh0RB2M E+JFpytxkdL5YEpQKSLTWt+GRYDUWKBgvUW6w0LeGKvAAlgH2qdsmebSwQZ5NdIiHbJm8eAsfbJ 9sIuvLQAwk05bXyoJLPJKj5ja68OCqoPF2hxU0qQ9PY9JoXi+MJ2wMxdIePPzn/M/bW6kESnb5B 3qSD8/A6blQhAmwMEX0V356MuSYYN/dbl3jlWH/HNh9+37GELCz5QLwmodKlJKiHCDvJ1UVhOD/ PLrIhVWmFyB5OMTbCRQYvRG3qsORdw3b9ORDhtU6qlXsClRfmazCqcD0OmdJ3Gkf/EJw+LcJjJv Ox55dQtwV+5Y9KJvkc2MUj17IaEaSQTKI9sxhegOortp/djLKE/z8oXQgGHOaHD2lf0NIV1Hg4k 4gJ84c1Rye+34fg== X-Developer-Key: i=rogerq@kernel.org; a=openpgp; fpr=412165D44C9F52780FAB1058D25A6BD3BE763093 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1792251403931128441 X-GMAIL-MSGID: 1792251403931128441 The RESET GPIO pinmux should be part of MDIO bus node so that they can be in the right state before the PHY can be probed via MDIO bus scan. Add GPIO reset for the Gigabit Ethernet PHY. As per RTL8211F datasheet, reset assert width is 10ms and PHY registers can be access accessed after 50ms of reset deassert. Signed-off-by: Roger Quadros --- arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) --- base-commit: bbef42084cc170cbfc035bf784f2ff055c939d7e change-id: 20240229-b4-for-v6-9-am65-beagleplay-ethernet-reset-098f274fbf15 Best regards, diff --git a/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts b/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts index a34e0df2ab86..77240cf3ae4d 100644 --- a/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts +++ b/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts @@ -292,6 +292,8 @@ mdio0_pins_default: mdio0-default-pins { pinctrl-single,pins = < AM62X_IOPAD(0x0160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */ AM62X_IOPAD(0x015c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */ + AM62X_IOPAD(0x003c, PIN_INPUT, 7) /* (M25) GPMC0_AD0.GPIO0_15 */ + AM62X_IOPAD(0x018c, PIN_OUTPUT, 7) /* (AC21) RGMII2_RD2.GPIO1_5 */ >; }; @@ -383,7 +385,6 @@ AM62X_IOPAD(0x017c, PIN_INPUT, 1) /* (AD22) RGMII2_RX_CTL.RMII2_RX_ER */ AM62X_IOPAD(0x016c, PIN_INPUT, 1) /* (Y18) RGMII2_TD0.RMII2_TXD0 */ AM62X_IOPAD(0x0170, PIN_INPUT, 1) /* (AA18) RGMII2_TD1.RMII2_TXD1 */ AM62X_IOPAD(0x0164, PIN_INPUT, 1) /* (AA19) RGMII2_TX_CTL.RMII2_TX_EN */ - AM62X_IOPAD(0x018c, PIN_OUTPUT, 7) /* (AC21) RGMII2_RD2.GPIO1_5 */ AM62X_IOPAD(0x0190, PIN_INPUT, 7) /* (AE22) RGMII2_RD3.GPIO1_6 */ AM62X_IOPAD(0x01f0, PIN_OUTPUT, 5) /* (A18) EXT_REFCLK1.CLKOUT0 */ >; @@ -597,6 +598,9 @@ &cpsw3g_mdio { cpsw3g_phy0: ethernet-phy@0 { reg = <0>; + reset-gpios = <&main_gpio0 15 GPIO_ACTIVE_LOW>; + reset-assert-us = <10000>; + reset-deassert-us = <50000>; }; cpsw3g_phy1: ethernet-phy@1 { @@ -615,7 +619,7 @@ &main_gpio0 { "USR0", "USR1", "USR2", "USR3", "", "", "USR4", /* 3-9 */ "EEPROM_WP", /* 10 */ "CSI2_CAMERA_GPIO1", "CSI2_CAMERA_GPIO2", /* 11-12 */ - "CC1352P7_BOOT", "CC1352P7_RSTN", "", "", "", /* 13-17 */ + "CC1352P7_BOOT", "CC1352P7_RSTN", "GBE_RSTN", "", "", /* 13-17 */ "USR_BUTTON", "", "", "", "", "", "", "", "", /* 18-26 */ "", "", "", "", "", "", "", "", "", "HDMI_INT", /* 27-36 */ "", "VDD_WLAN_EN", "", "", "WL_IRQ", "GBE_INTN",/* 37-42 */