From patchwork Mon Feb 26 21:26:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 206931 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:a81b:b0:108:e6aa:91d0 with SMTP id bq27csp2343376dyb; Mon, 26 Feb 2024 13:29:00 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWIOXQCSo5/OkR0omnFn/Gvv47242jWxj2KItGJedvMgg9nxZDKN96hGsRodkeSeQ/E9HT9Z/gYIhkRWkht/VZxFSJRSA== X-Google-Smtp-Source: AGHT+IH/SlmZbfRHpgwOREjKrfuVVBbScVwcDl8tnTL9U0McTx52vK8K80K97/V55N2Un6XCY9Dp X-Received: by 2002:a05:6a20:61d:b0:1a0:ccf2:8f44 with SMTP id 29-20020a056a20061d00b001a0ccf28f44mr359711pzl.21.1708982940192; Mon, 26 Feb 2024 13:29:00 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708982940; cv=pass; d=google.com; s=arc-20160816; b=zRSkgBuolbE5la2ZdolhpYPrw+1ICa+U2q5RMeC/np6mRqI1/4ETrbdwf8LuMno3Hh 03l9h5nEsRZIzEpcPGGB+q8RK/B5iuTRen4X5W2KJrTrUCBup6bqs1b3UfkG8kHxH8St y0icrIGD+rnAy2BHa74YQ9HttwbN8kXKJDXMZOIWQXHB1ijbE56giNOUD0j0PzJndT9B U/0uOKssqRS+cQbO8Vk+fkfR2rMhMPPJm0Y0WRP03mWddzChiBlGD7NSn/DHqtKUuLIa 1qSx9z2yCrZ2rO4AhDmjl/XAiavr0Qfr5Xest8doQoH/6rmTEYwdelL0qvzJc9PuqVw1 YB8Q== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=HLyNORsVOOI6Y2v4dqTIaBiPlFvOmMrEOlKo//M3HlI=; fh=2kugK1pFgomYt9tU/DHc4vnVxK9nY+59o4aLNtZt1JU=; b=Xtracan6SfSyRsWt7dxwSSoikavLbVx6gaMTO7jICO4F+uY4rM3gyKuwaShDBDsP3+ NMoXyAbAf8XE7ngtJUzuIt0W2KHzkhgGCIve8SG1592qvjK3wuSnk3z6G5BvCz8SCrfl Iwh/15RAcyggqqJb/+YlYfDmNIDVj6QtJkR62F7XJ6d88qeReiC4SpRXzVWIKTNxJI4l jJdcshkqBE2KzhMpiFLYBe80UubK67L3/oRVfUVZGhpuJFjpF5w9zrhJsy3ie8x1olGN 4Rw9ZJmzuhEf04Sk+WoDkRZipAwGa7niVjbMmh1bnr6NtYlPGO0IT5uW0OodWP2lDyuU eIjA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=mmONmO+X; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-82340-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-82340-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. [2604:1380:45e3:2400::1]) by mx.google.com with ESMTPS id g30-20020a63111e000000b005dcd6508942si4139646pgl.441.2024.02.26.13.29.00 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Feb 2024 13:29:00 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-82340-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) client-ip=2604:1380:45e3:2400::1; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=mmONmO+X; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-82340-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-82340-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 032B028F08F for ; Mon, 26 Feb 2024 21:29:00 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 6E604133288; Mon, 26 Feb 2024 21:27:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="mmONmO+X" Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CE72213172B; Mon, 26 Feb 2024 21:27:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708982865; cv=none; b=ZYM1m2VnvbkRXKpiXYipa5JFNKbqYzBar1/G6AyKLlNaD/u3xhyQ4A1iSMYHrxIJE/1Cst9ljVFAO+maR5vcXhIAOhPq9Yz/zU08fvi/VnzeB8k9MknjYNlaghB3G1/JbnU3aD9u4JCzr/UewIrWl+tLlVW+f8aiv2EFFkJfX3o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708982865; c=relaxed/simple; bh=resC3EdVnr1VmQ6d66ZukTMXBA464nmyoeCuIzkpf5w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=i29zylIHRci1+539vb0xDmJDrQncAd/wTabZ3rF0mJGSaNgpzjnnXgXdBRGNF3DNtfIfTXJp53BuSz9/ClMMx5ASU3CHaifVlMtKscwLxAJ7ctEyNzexTSglHCe5Net9lnhirMrPAkH8Qkqg2uWhgFtqY2dfrxSXq0M8Q22+Dqs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=mmONmO+X; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 348EAC433A6; Mon, 26 Feb 2024 21:27:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1708982865; bh=resC3EdVnr1VmQ6d66ZukTMXBA464nmyoeCuIzkpf5w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mmONmO+XppZSG6LvWPC/lnMImsryJWk884qTzGlqQLwpo+2seJIkUmDWfSIGt38YL VtQgw+qncU/xp6XMHe0+ySYeLqi5JYHhthcoDTbxOLYXRKWj6oQu4q/iA2aprRrnnW SRYDmLb3DQNkhzVnnBSjEQ9DdBwI/sHi9wqc5zZTfcicqR/WN9YIxXlLviEz2Ay1Zu ALQBma+Bm+JYs/Y4azcfTVtuANA7DahM3YncN6aboCFc0F1cYv+8v+z63Rkja3IVfX WMTw465QzDmB91t5NkVFVVCdkjP4N0hlEltKlFvIPyKXlRvYWYRFuOopEuoVDnlcAX zqlG5+hWNociA== Received: by mercury (Postfix, from userid 1000) id A650E1060D95; Mon, 26 Feb 2024 22:27:41 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Shawn Guo , Sascha Hauer , Fabio Estevam , imx@lists.linux.dev Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Pengutronix Kernel Team , Dong Aisheng , Linus Walleij , Dmitry Torokhov , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring Subject: [PATCH v5 1/6] dt-bindings: pinctrl: fsl,imx6ul-pinctrl: convert to YAML Date: Mon, 26 Feb 2024 22:26:23 +0100 Message-ID: <20240226212740.2019837-2-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240226212740.2019837-1-sre@kernel.org> References: <20240226212740.2019837-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791998495789967536 X-GMAIL-MSGID: 1791998495789967536 Convert i.MX6UL pinctrl bindings to YAML. Reviewed-by: Linus Walleij Reviewed-by: Rob Herring Signed-off-by: Sebastian Reichel --- .../bindings/pinctrl/fsl,imx6ul-pinctrl.txt | 37 ------ .../bindings/pinctrl/fsl,imx6ul-pinctrl.yaml | 116 ++++++++++++++++++ 2 files changed, 116 insertions(+), 37 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt deleted file mode 100644 index 7ca4f6118d9a..000000000000 --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt +++ /dev/null @@ -1,37 +0,0 @@ -* Freescale i.MX6 UltraLite IOMUX Controller - -Please refer to fsl,imx-pinctrl.txt in this directory for common binding part -and usage. - -Required properties: -- compatible: "fsl,imx6ul-iomuxc" for main IOMUX controller or - "fsl,imx6ull-iomuxc-snvs" for i.MX 6ULL's SNVS IOMUX controller. -- fsl,pins: each entry consists of 6 integers and represents the mux and config - setting for one pin. The first 5 integers are specified using a PIN_FUNC_ID macro, which can be found in - imx6ul-pinfunc.h under device tree source folder. The last integer CONFIG is - the pad setting value like pull-up on this pin. Please refer to i.MX6 UltraLite - Reference Manual for detailed CONFIG settings. - -CONFIG bits definition: -PAD_CTL_HYS (1 << 16) -PAD_CTL_PUS_100K_DOWN (0 << 14) -PAD_CTL_PUS_47K_UP (1 << 14) -PAD_CTL_PUS_100K_UP (2 << 14) -PAD_CTL_PUS_22K_UP (3 << 14) -PAD_CTL_PUE (1 << 13) -PAD_CTL_PKE (1 << 12) -PAD_CTL_ODE (1 << 11) -PAD_CTL_SPEED_LOW (0 << 6) -PAD_CTL_SPEED_MED (1 << 6) -PAD_CTL_SPEED_HIGH (3 << 6) -PAD_CTL_DSE_DISABLE (0 << 3) -PAD_CTL_DSE_260ohm (1 << 3) -PAD_CTL_DSE_130ohm (2 << 3) -PAD_CTL_DSE_87ohm (3 << 3) -PAD_CTL_DSE_65ohm (4 << 3) -PAD_CTL_DSE_52ohm (5 << 3) -PAD_CTL_DSE_43ohm (6 << 3) -PAD_CTL_DSE_37ohm (7 << 3) -PAD_CTL_SRE_FAST (1 << 0) -PAD_CTL_SRE_SLOW (0 << 0) diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml new file mode 100644 index 000000000000..906b264a9e3c --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml @@ -0,0 +1,116 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/fsl,imx6ul-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale IMX6UL IOMUX Controller + +maintainers: + - Dong Aisheng + +description: + Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory + for common binding part and usage. + +allOf: + - $ref: pinctrl.yaml# + +properties: + compatible: + enum: + - fsl,imx6ul-iomuxc + - fsl,imx6ull-iomuxc-snvs + + reg: + maxItems: 1 + +# Client device subnode's properties +patternProperties: + 'grp$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + + properties: + fsl,pins: + description: + each entry consists of 6 integers and represents the mux and config + setting for one pin. The first 5 integers are specified using a PIN_FUNC_ID macro, which can + be found in . The last integer + CONFIG is the pad setting value like pull-up on this pin. Please + refer to i.MX6UL Reference Manual for detailed CONFIG settings. + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + items: + - description: | + "mux_reg" indicates the offset of mux register. + - description: | + "conf_reg" indicates the offset of pad configuration register. + - description: | + "input_reg" indicates the offset of select input register. + - description: | + "mux_val" indicates the mux value to be applied. + - description: | + "input_val" indicates the select input value to be applied. + - description: | + "pad_setting" indicates the pad configuration value to be applied: + PAD_CTL_HYS (1 << 16) + PAD_CTL_PUS_100K_DOWN (0 << 14) + PAD_CTL_PUS_47K_UP (1 << 14) + PAD_CTL_PUS_100K_UP (2 << 14) + PAD_CTL_PUS_22K_UP (3 << 14) + PAD_CTL_PUE (1 << 13) + PAD_CTL_PKE (1 << 12) + PAD_CTL_ODE (1 << 11) + PAD_CTL_SPEED_LOW (0 << 6) + PAD_CTL_SPEED_MED (1 << 6) + PAD_CTL_SPEED_HIGH (3 << 6) + PAD_CTL_DSE_DISABLE (0 << 3) + PAD_CTL_DSE_260ohm (1 << 3) + PAD_CTL_DSE_130ohm (2 << 3) + PAD_CTL_DSE_87ohm (3 << 3) + PAD_CTL_DSE_65ohm (4 << 3) + PAD_CTL_DSE_52ohm (5 << 3) + PAD_CTL_DSE_43ohm (6 << 3) + PAD_CTL_DSE_37ohm (7 << 3) + PAD_CTL_SRE_FAST (1 << 0) + PAD_CTL_SRE_SLOW (0 << 0) + + required: + - fsl,pins + + additionalProperties: false + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + iomuxc: pinctrl@20e0000 { + compatible = "fsl,imx6ul-iomuxc"; + reg = <0x020e0000 0x4000>; + + mux_uart: uartgrp { + fsl,pins = < + 0x0084 0x0310 0x0000 0 0 0x1b0b1 + 0x0088 0x0314 0x0624 0 3 0x1b0b1 + >; + }; + }; + - | + iomuxc_snvs: pinctrl@2290000 { + compatible = "fsl,imx6ull-iomuxc-snvs"; + reg = <0x02290000 0x4000>; + + pinctrl_snvs_usbc_det: snvsusbcdetgrp { + fsl,pins = < + 0x0010 0x0054 0x0000 0x5 0x0 0x130b0 + >; + }; + };