Message ID | 20240226093333.2581092-1-mubin.sayyed@amd.com |
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State | New |
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Mon, 26 Feb 2024 03:34:01 -0600 From: Mubin Sayyed <mubin.sayyed@amd.com> To: <krzysztof.kozlowski+dt@linaro.org>, <robh+dt@kernel.org>, <conor+dt@kernel.org>, <devicetree@vger.kernel.org> CC: <daniel.lezcano@linaro.org>, <tglx@linutronix.de>, <michal.simek@amd.com>, <linux-kernel@vger.kernel.org>, Mubin Sayyed <mubin.sayyed@amd.com>, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Subject: [PATCH v3] dt-bindings: timer: Add support for cadence TTC PWM Date: Mon, 26 Feb 2024 15:03:33 +0530 Message-ID: <20240226093333.2581092-1-mubin.sayyed@amd.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002BA4D:EE_|PH8PR12MB7136:EE_ X-MS-Office365-Filtering-Correlation-Id: 4f070777-eeaf-4ae0-178f-08dc36ae131b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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[v3] dt-bindings: timer: Add support for cadence TTC PWM
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Commit Message
Mubin Sayyed
Feb. 26, 2024, 9:33 a.m. UTC
Cadence TTC can act as PWM device, it will be supported through separate PWM framework based driver. Decision to configure specific TTC device as PWM or clocksource/clockevent would be done based on presence of "#pwm-cells" property. Also, interrupt property is not required for TTC PWM driver. Update bindings to support TTC PWM configuration. Signed-off-by: Mubin Sayyed <mubin.sayyed@amd.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- Changes for v3: Add Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> tag Remove bindings from subject 1/3 and 3/3 are dropped as of now (WIP). Changes for v2: Update subject Modify #pwm-cells to constant 3 Update example to use generic name link for v2: https://lore.kernel.org/linux-arm-kernel/20231114124748.581850-2-mubin.sayyed@amd.com/T/ --- .../devicetree/bindings/timer/cdns,ttc.yaml | 22 ++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-)
Comments
On 26/02/2024 10:33, Mubin Sayyed wrote: > Cadence TTC can act as PWM device, it will be supported through > separate PWM framework based driver. Decision to configure > specific TTC device as PWM or clocksource/clockevent would > be done based on presence of "#pwm-cells" property. > > Also, interrupt property is not required for TTC PWM driver. > Update bindings to support TTC PWM configuration. > > Signed-off-by: Mubin Sayyed <mubin.sayyed@amd.com> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > Changes for v3: > Add Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > tag > Remove bindings from subject > 1/3 and 3/3 are dropped as of now (WIP). > > Changes for v2: > Update subject > Modify #pwm-cells to constant 3 > Update example to use generic name > > link for v2: > https://lore.kernel.org/linux-arm-kernel/20231114124748.581850-2-mubin.sayyed@amd.com/T/ > --- Applied, thanks
diff --git a/Documentation/devicetree/bindings/timer/cdns,ttc.yaml b/Documentation/devicetree/bindings/timer/cdns,ttc.yaml index dbba780c9b02..da342464d32e 100644 --- a/Documentation/devicetree/bindings/timer/cdns,ttc.yaml +++ b/Documentation/devicetree/bindings/timer/cdns,ttc.yaml @@ -32,12 +32,23 @@ properties: description: | Bit width of the timer, necessary if not 16. + "#pwm-cells": + const: 3 + required: - compatible - reg - - interrupts - clocks +allOf: + - if: + not: + required: + - "#pwm-cells" + then: + required: + - interrupts + additionalProperties: false examples: @@ -50,3 +61,12 @@ examples: clocks = <&cpu_clk 3>; timer-width = <32>; }; + + - | + pwm: pwm@f8002000 { + compatible = "cdns,ttc"; + reg = <0xf8002000 0x1000>; + clocks = <&cpu_clk 3>; + timer-width = <32>; + #pwm-cells = <3>; + };