[2/3] dt-bindings: clock: ti: remove unstable remark
Commit Message
Several TI SoC clock bindings were marked as work-in-progress / unstable
between 2013-2016, for example in commit f60b1ea5ea7a ("CLK: TI: add
support for gate clock"). It was enough of time to consider them stable
and expect usual ABI rules.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
Documentation/devicetree/bindings/clock/ti/adpll.txt | 2 --
Documentation/devicetree/bindings/clock/ti/apll.txt | 2 --
Documentation/devicetree/bindings/clock/ti/autoidle.txt | 2 --
Documentation/devicetree/bindings/clock/ti/clockdomain.txt | 2 --
Documentation/devicetree/bindings/clock/ti/composite.txt | 2 --
Documentation/devicetree/bindings/clock/ti/divider.txt | 2 --
Documentation/devicetree/bindings/clock/ti/dpll.txt | 2 --
Documentation/devicetree/bindings/clock/ti/fapll.txt | 2 --
.../devicetree/bindings/clock/ti/fixed-factor-clock.txt | 2 --
Documentation/devicetree/bindings/clock/ti/gate.txt | 2 --
Documentation/devicetree/bindings/clock/ti/interface.txt | 2 --
Documentation/devicetree/bindings/clock/ti/mux.txt | 2 --
12 files changed, 24 deletions(-)
Comments
On Sat, 24 Feb 2024 10:12:35 +0100, Krzysztof Kozlowski wrote:
> Several TI SoC clock bindings were marked as work-in-progress / unstable
> between 2013-2016, for example in commit f60b1ea5ea7a ("CLK: TI: add
> support for gate clock"). It was enough of time to consider them stable
> and expect usual ABI rules.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
> Documentation/devicetree/bindings/clock/ti/adpll.txt | 2 --
> Documentation/devicetree/bindings/clock/ti/apll.txt | 2 --
> Documentation/devicetree/bindings/clock/ti/autoidle.txt | 2 --
> Documentation/devicetree/bindings/clock/ti/clockdomain.txt | 2 --
> Documentation/devicetree/bindings/clock/ti/composite.txt | 2 --
> Documentation/devicetree/bindings/clock/ti/divider.txt | 2 --
> Documentation/devicetree/bindings/clock/ti/dpll.txt | 2 --
> Documentation/devicetree/bindings/clock/ti/fapll.txt | 2 --
> .../devicetree/bindings/clock/ti/fixed-factor-clock.txt | 2 --
> Documentation/devicetree/bindings/clock/ti/gate.txt | 2 --
> Documentation/devicetree/bindings/clock/ti/interface.txt | 2 --
> Documentation/devicetree/bindings/clock/ti/mux.txt | 2 --
> 12 files changed, 24 deletions(-)
>
Acked-by: Rob Herring <robh@kernel.org>
+Tony
Quoting Krzysztof Kozlowski (2024-02-24 01:12:35)
> Several TI SoC clock bindings were marked as work-in-progress / unstable
> between 2013-2016, for example in commit f60b1ea5ea7a ("CLK: TI: add
> support for gate clock"). It was enough of time to consider them stable
> and expect usual ABI rules.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
Acked-by: Stephen Boyd <sboyd@kernel.org>
> Documentation/devicetree/bindings/clock/ti/adpll.txt | 2 --
> Documentation/devicetree/bindings/clock/ti/apll.txt | 2 --
> Documentation/devicetree/bindings/clock/ti/autoidle.txt | 2 --
> Documentation/devicetree/bindings/clock/ti/clockdomain.txt | 2 --
> Documentation/devicetree/bindings/clock/ti/composite.txt | 2 --
> Documentation/devicetree/bindings/clock/ti/divider.txt | 2 --
> Documentation/devicetree/bindings/clock/ti/dpll.txt | 2 --
> Documentation/devicetree/bindings/clock/ti/fapll.txt | 2 --
> .../devicetree/bindings/clock/ti/fixed-factor-clock.txt | 2 --
> Documentation/devicetree/bindings/clock/ti/gate.txt | 2 --
> Documentation/devicetree/bindings/clock/ti/interface.txt | 2 --
> Documentation/devicetree/bindings/clock/ti/mux.txt | 2 --
> 12 files changed, 24 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/clock/ti/adpll.txt b/Documentation/devicetree/bindings/clock/ti/adpll.txt
> index 4c8a2ce2cd70..3122360adcf3 100644
> --- a/Documentation/devicetree/bindings/clock/ti/adpll.txt
> +++ b/Documentation/devicetree/bindings/clock/ti/adpll.txt
> @@ -1,7 +1,5 @@
> Binding for Texas Instruments ADPLL clock.
>
> -Binding status: Unstable - ABI compatibility may be broken in the future
> -
> This binding uses the common clock binding[1]. It assumes a
> register-mapped ADPLL with two to three selectable input clocks
> and three to four children.
> diff --git a/Documentation/devicetree/bindings/clock/ti/apll.txt b/Documentation/devicetree/bindings/clock/ti/apll.txt
> index ade4dd4c30f0..bbd505c1199d 100644
> --- a/Documentation/devicetree/bindings/clock/ti/apll.txt
> +++ b/Documentation/devicetree/bindings/clock/ti/apll.txt
> @@ -1,7 +1,5 @@
> Binding for Texas Instruments APLL clock.
>
> -Binding status: Unstable - ABI compatibility may be broken in the future
> -
> This binding uses the common clock binding[1]. It assumes a
> register-mapped APLL with usually two selectable input clocks
> (reference clock and bypass clock), with analog phase locked
> diff --git a/Documentation/devicetree/bindings/clock/ti/autoidle.txt b/Documentation/devicetree/bindings/clock/ti/autoidle.txt
> index 7c735dde9fe9..05645a10a9e3 100644
> --- a/Documentation/devicetree/bindings/clock/ti/autoidle.txt
> +++ b/Documentation/devicetree/bindings/clock/ti/autoidle.txt
> @@ -1,7 +1,5 @@
> Binding for Texas Instruments autoidle clock.
>
> -Binding status: Unstable - ABI compatibility may be broken in the future
> -
> This binding uses the common clock binding[1]. It assumes a register mapped
> clock which can be put to idle automatically by hardware based on the usage
> and a configuration bit setting. Autoidle clock is never an individual
> diff --git a/Documentation/devicetree/bindings/clock/ti/clockdomain.txt b/Documentation/devicetree/bindings/clock/ti/clockdomain.txt
> index 9c6199249ce5..edf0b5d42768 100644
> --- a/Documentation/devicetree/bindings/clock/ti/clockdomain.txt
> +++ b/Documentation/devicetree/bindings/clock/ti/clockdomain.txt
> @@ -1,7 +1,5 @@
> Binding for Texas Instruments clockdomain.
>
> -Binding status: Unstable - ABI compatibility may be broken in the future
> -
> This binding uses the common clock binding[1] in consumer role.
> Every clock on TI SoC belongs to one clockdomain, but software
> only needs this information for specific clocks which require
> diff --git a/Documentation/devicetree/bindings/clock/ti/composite.txt b/Documentation/devicetree/bindings/clock/ti/composite.txt
> index 33ac7c9ad053..6f7e1331b546 100644
> --- a/Documentation/devicetree/bindings/clock/ti/composite.txt
> +++ b/Documentation/devicetree/bindings/clock/ti/composite.txt
> @@ -1,7 +1,5 @@
> Binding for TI composite clock.
>
> -Binding status: Unstable - ABI compatibility may be broken in the future
> -
> This binding uses the common clock binding[1]. It assumes a
> register-mapped composite clock with multiple different sub-types;
>
> diff --git a/Documentation/devicetree/bindings/clock/ti/divider.txt b/Documentation/devicetree/bindings/clock/ti/divider.txt
> index 9b13b32974f9..4d7c76f0b356 100644
> --- a/Documentation/devicetree/bindings/clock/ti/divider.txt
> +++ b/Documentation/devicetree/bindings/clock/ti/divider.txt
> @@ -1,7 +1,5 @@
> Binding for TI divider clock
>
> -Binding status: Unstable - ABI compatibility may be broken in the future
> -
> This binding uses the common clock binding[1]. It assumes a
> register-mapped adjustable clock rate divider that does not gate and has
> only one input clock or parent. By default the value programmed into
> diff --git a/Documentation/devicetree/bindings/clock/ti/dpll.txt b/Documentation/devicetree/bindings/clock/ti/dpll.txt
> index 37a7cb6ad07d..14a1b72c2e71 100644
> --- a/Documentation/devicetree/bindings/clock/ti/dpll.txt
> +++ b/Documentation/devicetree/bindings/clock/ti/dpll.txt
> @@ -1,7 +1,5 @@
> Binding for Texas Instruments DPLL clock.
>
> -Binding status: Unstable - ABI compatibility may be broken in the future
> -
> This binding uses the common clock binding[1]. It assumes a
> register-mapped DPLL with usually two selectable input clocks
> (reference clock and bypass clock), with digital phase locked
> diff --git a/Documentation/devicetree/bindings/clock/ti/fapll.txt b/Documentation/devicetree/bindings/clock/ti/fapll.txt
> index c19b3f253b8c..88986ef39ddd 100644
> --- a/Documentation/devicetree/bindings/clock/ti/fapll.txt
> +++ b/Documentation/devicetree/bindings/clock/ti/fapll.txt
> @@ -1,7 +1,5 @@
> Binding for Texas Instruments FAPLL clock.
>
> -Binding status: Unstable - ABI compatibility may be broken in the future
> -
> This binding uses the common clock binding[1]. It assumes a
> register-mapped FAPLL with usually two selectable input clocks
> (reference clock and bypass clock), and one or more child
> diff --git a/Documentation/devicetree/bindings/clock/ti/fixed-factor-clock.txt b/Documentation/devicetree/bindings/clock/ti/fixed-factor-clock.txt
> index 518e3c142276..dc69477b6e98 100644
> --- a/Documentation/devicetree/bindings/clock/ti/fixed-factor-clock.txt
> +++ b/Documentation/devicetree/bindings/clock/ti/fixed-factor-clock.txt
> @@ -1,7 +1,5 @@
> Binding for TI fixed factor rate clock sources.
>
> -Binding status: Unstable - ABI compatibility may be broken in the future
> -
> This binding uses the common clock binding[1], and also uses the autoidle
> support from TI autoidle clock [2].
>
> diff --git a/Documentation/devicetree/bindings/clock/ti/gate.txt b/Documentation/devicetree/bindings/clock/ti/gate.txt
> index 4982615c01b9..a8e0335b006a 100644
> --- a/Documentation/devicetree/bindings/clock/ti/gate.txt
> +++ b/Documentation/devicetree/bindings/clock/ti/gate.txt
> @@ -1,7 +1,5 @@
> Binding for Texas Instruments gate clock.
>
> -Binding status: Unstable - ABI compatibility may be broken in the future
> -
> This binding uses the common clock binding[1]. This clock is
> quite much similar to the basic gate-clock [2], however,
> it supports a number of additional features. If no register
> diff --git a/Documentation/devicetree/bindings/clock/ti/interface.txt b/Documentation/devicetree/bindings/clock/ti/interface.txt
> index d3eb5ca92a7f..85fb1f2d2d28 100644
> --- a/Documentation/devicetree/bindings/clock/ti/interface.txt
> +++ b/Documentation/devicetree/bindings/clock/ti/interface.txt
> @@ -1,7 +1,5 @@
> Binding for Texas Instruments interface clock.
>
> -Binding status: Unstable - ABI compatibility may be broken in the future
> -
> This binding uses the common clock binding[1]. This clock is
> quite much similar to the basic gate-clock [2], however,
> it supports a number of additional features, including
> diff --git a/Documentation/devicetree/bindings/clock/ti/mux.txt b/Documentation/devicetree/bindings/clock/ti/mux.txt
> index b33f641f1043..cd56d3c1c09f 100644
> --- a/Documentation/devicetree/bindings/clock/ti/mux.txt
> +++ b/Documentation/devicetree/bindings/clock/ti/mux.txt
> @@ -1,7 +1,5 @@
> Binding for TI mux clock.
>
> -Binding status: Unstable - ABI compatibility may be broken in the future
> -
> This binding uses the common clock binding[1]. It assumes a
> register-mapped multiplexer with multiple input clock signals or
> parents, one of which can be selected as output. This clock does not
> --
> 2.34.1
>
@@ -1,7 +1,5 @@
Binding for Texas Instruments ADPLL clock.
-Binding status: Unstable - ABI compatibility may be broken in the future
-
This binding uses the common clock binding[1]. It assumes a
register-mapped ADPLL with two to three selectable input clocks
and three to four children.
@@ -1,7 +1,5 @@
Binding for Texas Instruments APLL clock.
-Binding status: Unstable - ABI compatibility may be broken in the future
-
This binding uses the common clock binding[1]. It assumes a
register-mapped APLL with usually two selectable input clocks
(reference clock and bypass clock), with analog phase locked
@@ -1,7 +1,5 @@
Binding for Texas Instruments autoidle clock.
-Binding status: Unstable - ABI compatibility may be broken in the future
-
This binding uses the common clock binding[1]. It assumes a register mapped
clock which can be put to idle automatically by hardware based on the usage
and a configuration bit setting. Autoidle clock is never an individual
@@ -1,7 +1,5 @@
Binding for Texas Instruments clockdomain.
-Binding status: Unstable - ABI compatibility may be broken in the future
-
This binding uses the common clock binding[1] in consumer role.
Every clock on TI SoC belongs to one clockdomain, but software
only needs this information for specific clocks which require
@@ -1,7 +1,5 @@
Binding for TI composite clock.
-Binding status: Unstable - ABI compatibility may be broken in the future
-
This binding uses the common clock binding[1]. It assumes a
register-mapped composite clock with multiple different sub-types;
@@ -1,7 +1,5 @@
Binding for TI divider clock
-Binding status: Unstable - ABI compatibility may be broken in the future
-
This binding uses the common clock binding[1]. It assumes a
register-mapped adjustable clock rate divider that does not gate and has
only one input clock or parent. By default the value programmed into
@@ -1,7 +1,5 @@
Binding for Texas Instruments DPLL clock.
-Binding status: Unstable - ABI compatibility may be broken in the future
-
This binding uses the common clock binding[1]. It assumes a
register-mapped DPLL with usually two selectable input clocks
(reference clock and bypass clock), with digital phase locked
@@ -1,7 +1,5 @@
Binding for Texas Instruments FAPLL clock.
-Binding status: Unstable - ABI compatibility may be broken in the future
-
This binding uses the common clock binding[1]. It assumes a
register-mapped FAPLL with usually two selectable input clocks
(reference clock and bypass clock), and one or more child
@@ -1,7 +1,5 @@
Binding for TI fixed factor rate clock sources.
-Binding status: Unstable - ABI compatibility may be broken in the future
-
This binding uses the common clock binding[1], and also uses the autoidle
support from TI autoidle clock [2].
@@ -1,7 +1,5 @@
Binding for Texas Instruments gate clock.
-Binding status: Unstable - ABI compatibility may be broken in the future
-
This binding uses the common clock binding[1]. This clock is
quite much similar to the basic gate-clock [2], however,
it supports a number of additional features. If no register
@@ -1,7 +1,5 @@
Binding for Texas Instruments interface clock.
-Binding status: Unstable - ABI compatibility may be broken in the future
-
This binding uses the common clock binding[1]. This clock is
quite much similar to the basic gate-clock [2], however,
it supports a number of additional features, including
@@ -1,7 +1,5 @@
Binding for TI mux clock.
-Binding status: Unstable - ABI compatibility may be broken in the future
-
This binding uses the common clock binding[1]. It assumes a
register-mapped multiplexer with multiple input clock signals or
parents, one of which can be selected as output. This clock does not