| Message ID | 20240223152124.20042-2-johan+linaro@kernel.org |
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From: Johan Hovold <johan+linaro@kernel.org>
To: Bjorn Helgaas <bhelgaas@google.com>,
Bjorn Andersson <andersson@kernel.org>
Cc: Konrad Dybcio <konrad.dybcio@linaro.org>,
Lorenzo Pieralisi <lpieralisi@kernel.org>, =?utf-8?q?Krzysztof_Wilczy=C5=84?=
=?utf-8?q?ski?= <kw@linux.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
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Johan Hovold <johan+linaro@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Subject: [PATCH v2 01/12] dt-bindings: PCI: qcom: Allow 'required-opps'
Date: Fri, 23 Feb 2024 16:21:13 +0100
Message-ID: <20240223152124.20042-2-johan+linaro@kernel.org>
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| Series |
arm64: dts: qcom: sc8280xp: PCIe fixes and GICv3 ITS enable
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Commit Message
Johan Hovold
Feb. 23, 2024, 3:21 p.m. UTC
Some Qualcomm SoCs require a minimum performance level for the power domain so add 'required-opps' to the binding. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> --- Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index a93ab3b54066..5eda4e72f681 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -123,6 +123,9 @@ properties: description: GPIO controlled connection to PERST# signal maxItems: 1 + required-opps: + maxItems: 1 + wake-gpios: description: GPIO controlled connection to WAKE# signal maxItems: 1