Message ID | 20240222183955.292E89F8@davehans-spike.ostc.intel.com |
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State | New |
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Series |
x86: Rework system-wide configuration masquerading as per-cpu data
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Commit Message
Dave Hansen
Feb. 22, 2024, 6:39 p.m. UTC
From: Dave Hansen <dave.hansen@linux.intel.com> x86_clflush_size is maintained per-cpu despite being global configuration. Move it to 'x86_config'. Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> --- b/arch/x86/include/asm/processor.h | 4 ++-- b/arch/x86/kernel/cpu/common.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-)
diff -puN arch/x86/include/asm/processor.h~bsp-clflush_size arch/x86/include/asm/processor.h --- a/arch/x86/include/asm/processor.h~bsp-clflush_size 2024-02-22 10:08:59.208875301 -0800 +++ b/arch/x86/include/asm/processor.h 2024-02-22 10:08:59.212875458 -0800 @@ -148,7 +148,6 @@ struct cpuinfo_x86 { u64 ppin; /* cpuid returned max cores value: */ u16 x86_max_cores; - u16 x86_clflush_size; /* number of cores as seen by the OS: */ u16 booted_cores; /* Index into per_cpu list: */ @@ -191,6 +190,7 @@ struct x86_sys_config { /* Address bits supported by all processors */ u8 phys_bits; u8 virt_bits; + u16 clflush_size; }; extern struct x86_sys_config x86_config; @@ -812,7 +812,7 @@ static inline u8 x86_virt_bits(void) static inline u8 x86_clflush_size(void) { - return boot_cpu_data.x86_clflush_size; + return x86_config.clflush_size; } #endif /* _ASM_X86_PROCESSOR_H */ diff -puN arch/x86/kernel/cpu/common.c~bsp-clflush_size arch/x86/kernel/cpu/common.c --- a/arch/x86/kernel/cpu/common.c~bsp-clflush_size 2024-02-22 10:08:59.208875301 -0800 +++ b/arch/x86/kernel/cpu/common.c 2024-02-22 10:08:59.212875458 -0800 @@ -1136,7 +1136,7 @@ void get_cpu_address_sizes(struct cpuinf x86_config.phys_bits = 36; } } - c->x86_clflush_size = detect_clflush_size(c); + x86_config.clflush_size = detect_clflush_size(c); c->x86_cache_bits = x86_config.phys_bits;