Message ID | 20240222183953.97E25EC4@davehans-spike.ostc.intel.com |
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State | New |
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Series |
x86: Rework system-wide configuration masquerading as per-cpu data
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Commit Message
Dave Hansen
Feb. 22, 2024, 6:39 p.m. UTC
From: Dave Hansen <dave.hansen@linux.intel.com> Now that the boot CPU's ->x86_cache_alignment is authoritative and is is consistently established, these other copies only serve to clobber it needlessly. Remove them. Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> --- b/arch/x86/kernel/cpu/common.c | 2 -- 1 file changed, 2 deletions(-)
diff -puN arch/x86/kernel/cpu/common.c~dup-cache-alignment arch/x86/kernel/cpu/common.c --- a/arch/x86/kernel/cpu/common.c~dup-cache-alignment 2024-02-22 10:08:58.260838084 -0800 +++ b/arch/x86/kernel/cpu/common.c 2024-02-22 10:08:58.260838084 -0800 @@ -956,7 +956,6 @@ void cpu_detect(struct cpuinfo_x86 *c) if (cap0 & (1<<19)) { if (c == &boot_cpu_data) c->x86_clflush_size = ((misc >> 8) & 0xff) * 8; - c->x86_cache_alignment = x86_clflush_size(); } } } @@ -1834,7 +1833,6 @@ static void identify_cpu(struct cpuinfo_ c->cpuid_level = -1; /* CPUID not detected */ c->x86_clflush_size = 32; #endif - c->x86_cache_alignment = x86_clflush_size(); memset(&c->x86_capability, 0, sizeof(c->x86_capability)); #ifdef CONFIG_X86_VMX_FEATURE_NAMES memset(&c->vmx_capability, 0, sizeof(c->vmx_capability));