[RFC,12/34] x86/cpu/intel: Actually use "address configuration" infrastructure for MKTME

Message ID 20240222183942.601EE2E5@davehans-spike.ostc.intel.com
State New
Headers
Series x86: Rework system-wide configuration masquerading as per-cpu data |

Commit Message

Dave Hansen Feb. 22, 2024, 6:39 p.m. UTC
  From: Dave Hansen <dave.hansen@linux.intel.com>

Now that the TME detection is only called once at boot, stop twiddling
'boot_cpu_data' directly and move over to 'bsp_addr_config'.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
---

 b/arch/x86/kernel/cpu/intel.c |    7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)
  

Comments

Kirill A. Shutemov Feb. 23, 2024, 11:41 a.m. UTC | #1
On Thu, Feb 22, 2024 at 10:39:42AM -0800, Dave Hansen wrote:
> 
> From: Dave Hansen <dave.hansen@linux.intel.com>
> 
> Now that the TME detection is only called once at boot, stop twiddling
> 'boot_cpu_data' directly and move over to 'bsp_addr_config'.
> 
> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
> ---
> 
>  b/arch/x86/kernel/cpu/intel.c |    7 ++-----
>  1 file changed, 2 insertions(+), 5 deletions(-)
> 
> diff -puN arch/x86/kernel/cpu/intel.c~intel-addr-reduce arch/x86/kernel/cpu/intel.c
> --- a/arch/x86/kernel/cpu/intel.c~intel-addr-reduce	2024-02-22 10:08:54.296682462 -0800
> +++ b/arch/x86/kernel/cpu/intel.c	2024-02-22 10:08:54.296682462 -0800
> @@ -401,11 +401,8 @@ detect_keyid_bits:
>  		mktme_status = MKTME_ENABLED;
>  	}
>  
> -	/*
> -	 * KeyID bits effectively lower the number of physical address
> -	 * bits.  Update cpuinfo_x86::x86_phys_bits accordingly.
> -	 */
> -	c->x86_phys_bits -= keyid_bits;
> +	/* KeyID bits effectively lower the number of physical address bits */
> +	bsp_addr_config.phys_addr_reduction_bits = keyid_bits;

Do we expect reduction_bits to stack? Like can multiple features steal
physical bits? Make use "+= keyid_bits" here?
  
Dave Hansen Feb. 23, 2024, 4:16 p.m. UTC | #2
On 2/23/24 03:41, Kirill A. Shutemov wrote:
>> -	/*
>> -	 * KeyID bits effectively lower the number of physical address
>> -	 * bits.  Update cpuinfo_x86::x86_phys_bits accordingly.
>> -	 */
>> -	c->x86_phys_bits -= keyid_bits;
>> +	/* KeyID bits effectively lower the number of physical address bits */
>> +	bsp_addr_config.phys_addr_reduction_bits = keyid_bits;
> Do we expect reduction_bits to stack? Like can multiple features steal
> physical bits? Make use "+= keyid_bits" here?

Good question.

IMNHO, the idea that different "users" of these fields can be oblivious
to each other is the reason that this has gotten so bad.

I thought about interfering or stacking a bit when I was putting this
together.  It's one of the reasons I chose to add the specific
'phys_addr_reduction_bits' field _instead_ of continuing to just munge
'phys_addr_bits'.

I want 'bsp_addr_config' to represent the *inputs* that eventually end
up in x86_config, and have the inputs distilled down to the output in
one (or very few) places.

There are thankfully very few users of this: Intel and AMD memory
encryption and one Intel CPU erratum for very old CPUs.  So they can't
stack in practice.

If we ever need something to stack, I'd prefer that we add two fields,
maybe:

	bsp_addr_config.enc_reduction_bits

and

	bsp_addr_config.maxphyaddr_erratum_override

or something, then have any collision be resolved when 'bsp_addr_config'
is consulted, in *ONE* central pace in the code.
  

Patch

diff -puN arch/x86/kernel/cpu/intel.c~intel-addr-reduce arch/x86/kernel/cpu/intel.c
--- a/arch/x86/kernel/cpu/intel.c~intel-addr-reduce	2024-02-22 10:08:54.296682462 -0800
+++ b/arch/x86/kernel/cpu/intel.c	2024-02-22 10:08:54.296682462 -0800
@@ -401,11 +401,8 @@  detect_keyid_bits:
 		mktme_status = MKTME_ENABLED;
 	}
 
-	/*
-	 * KeyID bits effectively lower the number of physical address
-	 * bits.  Update cpuinfo_x86::x86_phys_bits accordingly.
-	 */
-	c->x86_phys_bits -= keyid_bits;
+	/* KeyID bits effectively lower the number of physical address bits */
+	bsp_addr_config.phys_addr_reduction_bits = keyid_bits;
 }
 
 static void bsp_init_intel(struct cpuinfo_x86 *c)