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AJvYcCVKB18fAZcPHK8Tr1DgPJgEwQAuA1D/oXyK8O6Hhl6F8dmhRiCu0ajY0CDxeWAj32HLk1Inicx3kyYxzMz+xp2+jNC2BWaq7WB3Rcvr X-Gm-Message-State: AOJu0YwmR6TTVAyxmQ/YJfV0JphOeY7cggcX/Sp35yYpO50Wj1uoxHKf 0OPLZ4PaPPRsCps0h8RI/D9iWaApZnTIZ7sQtNJ5Zfc7AqMVPDj47C41cYzGaEDecA06Kz+eiKH uL5a9AF15/w== X-Received: from szatan.c.googlers.com ([fda3:e722:ac3:cc00:28:9cb1:c0a8:2d83]) (user=panikiel job=sendgmr) by 2002:a05:600c:54cc:b0:412:26f1:1d9b with SMTP id iw12-20020a05600c54cc00b0041226f11d9bmr116452wmb.0.1708531370075; Wed, 21 Feb 2024 08:02:50 -0800 (PST) Date: Wed, 21 Feb 2024 16:02:15 +0000 In-Reply-To: <20240221160215.484151-1-panikiel@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20240221160215.484151-1-panikiel@google.com> X-Mailer: git-send-email 2.44.0.rc0.258.g7320e95886-goog Message-ID: <20240221160215.484151-10-panikiel@google.com> Subject: [PATCH v2 9/9] ARM: dts: chameleonv3: Add video device nodes From: " =?utf-8?q?Pawe=C5=82_Anikiel?= " To: airlied@gmail.com, akpm@linux-foundation.org, conor+dt@kernel.org, daniel@ffwll.ch, dinguyen@kernel.org, hverkuil-cisco@xs4all.nl, krzysztof.kozlowski+dt@linaro.org, maarten.lankhorst@linux.intel.com, mchehab@kernel.org, mripard@kernel.org, robh+dt@kernel.org, tzimmermann@suse.de Cc: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, chromeos-krk-upstreaming@google.com, ribalda@chromium.org, " =?utf-8?q?Pawe?= =?utf-8?q?=C5=82_Anikiel?= " X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791525230744611089 X-GMAIL-MSGID: 1791525230744611089 Add device nodes for the video system present on the Chameleon v3. It consists of six framebuffers and two Intel Displayport receivers. Signed-off-by: Paweł Anikiel --- .../socfpga/socfpga_arria10_chameleonv3.dts | 152 ++++++++++++++++++ 1 file changed, 152 insertions(+) diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_chameleonv3.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_chameleonv3.dts index 422d00cd4c74..2f48f30cb538 100644 --- a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_chameleonv3.dts +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_chameleonv3.dts @@ -10,6 +10,158 @@ / { compatible = "google,chameleon-v3", "enclustra,mercury-aa1", "altr,socfpga-arria10", "altr,socfpga"; + soc { + fb0: video@c0060500 { + compatible = "google,chv3-fb"; + reg = <0xc0060500 0x100>, + <0xc0060f20 0x10>; + interrupts = ; + google,legacy-format; + }; + + fb_mst0: video@c0060600 { + compatible = "google,chv3-fb"; + reg = <0xc0060600 0x100>, + <0xc0060f30 0x10>; + interrupts = ; + + port { + fb_mst0_0: endpoint { + remote-endpoint = <&dprx_mst_0>; + }; + }; + }; + + fb_mst1: video@c0060700 { + compatible = "google,chv3-fb"; + reg = <0xc0060700 0x100>, + <0xc0060f40 0x10>; + interrupts = ; + + port { + fb_mst1_0: endpoint { + remote-endpoint = <&dprx_mst_1>; + }; + }; + }; + + fb_mst2: video@c0060800 { + compatible = "google,chv3-fb"; + reg = <0xc0060800 0x100>, + <0xc0060f50 0x10>; + interrupts = ; + + port { + fb_mst2_0: endpoint { + remote-endpoint = <&dprx_mst_2>; + }; + }; + }; + + fb_mst3: video@c0060900 { + compatible = "google,chv3-fb"; + reg = <0xc0060900 0x100>, + <0xc0060f60 0x10>; + interrupts = ; + + port { + fb_mst3_0: endpoint { + remote-endpoint = <&dprx_mst_3>; + }; + }; + }; + + fb_sst: video@c0060a00 { + compatible = "google,chv3-fb"; + reg = <0xc0060a00 0x100>, + <0xc0060f70 0x10>; + interrupts = ; + + port { + fb_sst_0: endpoint { + remote-endpoint = <&dprx_sst_0>; + }; + }; + }; + + dprx_mst_irq: intc@c0060f80 { + compatible = "altr,pio-1.0"; + reg = <0xc0060f80 0x10>; + interrupts = ; + altr,interrupt-type = ; + #interrupt-cells = <2>; + interrupt-controller; + }; + + dprx_sst_irq: intc@c0060fe0 { + compatible = "altr,pio-1.0"; + reg = <0xc0060fe0 0x10>; + interrupts = ; + altr,interrupt-type = ; + #interrupt-cells = <2>; + interrupt-controller; + }; + + dprx_mst: dp-receiver@c0062000 { + compatible = "intel,dprx-20.0.1"; + reg = <0xc0062000 0x800>; + interrupt-parent = <&dprx_mst_irq>; + interrupts = <0 IRQ_TYPE_EDGE_RISING>; + intel,max-link-rate = <0x1e>; + intel,max-lane-count = <4>; + intel,multi-stream-support; + intel,max-stream-count = <4>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dprx_mst_0: endpoint { + remote-endpoint = <&fb_mst0_0>; + }; + }; + + port@1 { + reg = <1>; + dprx_mst_1: endpoint { + remote-endpoint = <&fb_mst1_0>; + }; + }; + + port@2 { + reg = <2>; + dprx_mst_2: endpoint { + remote-endpoint = <&fb_mst2_0>; + }; + }; + + port@3 { + reg = <3>; + dprx_mst_3: endpoint { + remote-endpoint = <&fb_mst3_0>; + }; + }; + }; + }; + + dprx_sst: dp-receiver@c0064000 { + compatible = "intel,dprx-20.0.1"; + reg = <0xc0064000 0x800>; + interrupt-parent = <&dprx_sst_irq>; + interrupts = <0 IRQ_TYPE_EDGE_RISING>; + intel,max-link-rate = <0x1e>; + intel,max-lane-count = <4>; + + port { + dprx_sst_0: endpoint { + remote-endpoint = <&fb_sst_0>; + }; + }; + }; + }; + aliases { serial0 = &uart0; i2c0 = &i2c0;