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Wed, 21 Feb 2024 14:04:13 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 3wanvkycg2-1; Wed, 21 Feb 2024 14:04:13 +0000 Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 41LE4Dsk013291; Wed, 21 Feb 2024 14:04:13 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-msarkar-hyd.qualcomm.com [10.213.111.194]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 41LE4Dn1013288; Wed, 21 Feb 2024 14:04:13 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 0) id 2F78339C4; Wed, 21 Feb 2024 19:34:12 +0530 (+0530) From: root To: andersson@kernel.org, krzysztof.kozlowski+dt@linaro.org, jingoohan1@gmail.com, gustavo.pimentel@synopsys.com, konrad.dybcio@linaro.org, manivannan.sadhasivam@linaro.org, conor+dt@kernel.org, quic_nitegupt@quicinc.com Cc: quic_shazhuss@quicinc.com, quic_ramkri@quicinc.com, quic_nayiluri@quicinc.com, quic_krichai@quicinc.com, quic_vbadigan@quicinc.com, Mrinmay Sarkar , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 2/3] arm64: dts: qcom: sa8775p: Enable global irq support for SA8775p Date: Wed, 21 Feb 2024 19:34:03 +0530 Message-Id: <20240221140405.28532-3-root@hu-msarkar-hyd.qualcomm.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240221140405.28532-1-root@hu-msarkar-hyd.qualcomm.com> References: <20240221140405.28532-1-root@hu-msarkar-hyd.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 4wALU_qVqBbKAMtbv--65L8fdB7rohgw X-Proofpoint-GUID: 4wALU_qVqBbKAMtbv--65L8fdB7rohgw X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-20_06,2024-02-21_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 phishscore=0 suspectscore=0 impostorscore=0 priorityscore=1501 spamscore=0 mlxscore=0 adultscore=0 mlxlogscore=734 bulkscore=0 clxscore=1034 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2402120000 definitions=main-2402210109 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791517641297904969 X-GMAIL-MSGID: 1791517641297904969 From: Mrinmay Sarkar Global irq needed for PCIe controller related error reporting. So adding change to add global irq support for SA8775p RC platform. Signed-off-by: Mrinmay Sarkar --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index 73c52f465f87..68efccba50b0 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -3552,9 +3552,11 @@ pcie0: pcie@1c00000 { , , , - ; + , + ; interrupt-names = "msi0", "msi1", "msi2", "msi3", - "msi4", "msi5", "msi6", "msi7"; + "msi4", "msi5", "msi6", "msi7", + "global"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &intc GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>, @@ -3652,9 +3654,11 @@ pcie1: pcie@1c10000 { , , , - ; + , + ; interrupt-names = "msi0", "msi1", "msi2", "msi3", - "msi4", "msi5", "msi6", "msi7"; + "msi4", "msi5", "msi6", "msi7", + "global"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &intc GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,