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Wed, 21 Feb 2024 10:32:15 GMT Received: from hu-kriskura-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Wed, 21 Feb 2024 02:32:11 -0800 From: Krishna Kurapati To: Bjorn Andersson , Konrad Dybcio , Vinod Koul , "Kishon Vijay Abraham I" CC: , , , , , Krishna Kurapati Subject: [PATCH] phy: qcom-snps: Fixed order of enabling regulators Date: Wed, 21 Feb 2024 16:02:02 +0530 Message-ID: <20240221103202.3628142-1-quic_kriskura@quicinc.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: ILJFmlSJuSNWEwVZkyXON1nVzbmAYsHt X-Proofpoint-ORIG-GUID: ILJFmlSJuSNWEwVZkyXON1nVzbmAYsHt X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-20_06,2024-02-20_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 suspectscore=0 bulkscore=0 priorityscore=1501 spamscore=0 lowpriorityscore=0 mlxscore=0 phishscore=0 mlxlogscore=999 impostorscore=0 malwarescore=0 clxscore=1011 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2402120000 definitions=main-2402210081 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791504299538756801 X-GMAIL-MSGID: 1791504299538756801 The SNPS Femto phy has 3 supplies, vdda-pll (0.88V), vdd18 (1.8V), vdd33 (3.3V). The driver enables these in order of 0.88 -> 3.3 -> 1.88. But on phy instances which have EUD attached, it is seen that not enabling the regulators in the order of (0.88 -> 1.8V -> 3.3V) is causing the EUD to reset the phy (issue seen rarely) thereby disturbing enumeration. This change doesn't disturb operation of phy's where EUD is not present. According to the some of the applicable power-supply ramp scenarios present in data book: (DVDD is 0.88V, VDDH is 1.8V) a) VDDH<#> and VDD33<#> held to 0 V (cannot be left floating) with DVDD ramped to a valid level b) VDD33<#> held to 0 V (cannot be left floating) with DVDD and VDDH<#> ramped to their respective, valid levels Modify the driver to power up the phy regulators in order of: 0.88 -> 1.8 -> 3.3 respectively. Signed-off-by: Krishna Kurapati --- Downstream kernels on QC targets use this sequence to power up the phy and this has been tested extensively on multiple targets. This change has been tested with upstream kernel on QCM6490-IDP without EUD to ensure there is no loss or breakage of functionality. drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c index eb0b0f61d98e..e86d221b7397 100644 --- a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c +++ b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c @@ -79,7 +79,7 @@ #define LS_FS_OUTPUT_IMPEDANCE_MASK GENMASK(3, 0) static const char * const qcom_snps_hsphy_vreg_names[] = { - "vdda-pll", "vdda33", "vdda18", + "vdda-pll", "vdda18", "vdda33", }; #define SNPS_HS_NUM_VREGS ARRAY_SIZE(qcom_snps_hsphy_vreg_names)