[v2] riscv: hwprobe: export largest userspace address

  Some userspace applications (OpenJDK for instance) uses the free MSBs
in pointers to insert additional information for their own logic and
need to get this information from somewhere. Currently they rely on
parsing /proc/cpuinfo "mmu=svxx" string to obtain the current value of
virtual address used bits [1]. Since this reflect the raw MMU mode
supported, it might differ from the logical one used internally.
Exporting the maximum mmappable address through hwprobe will allow a
more stable interface to be used. For that purpose, add a new hwprobe
key named RISCV_HWPROBE_MAX_KEY which will export the maximum mmappable
userspace address.

Link: https://github.com/openjdk/jdk/blob/master/src/hotspot/os_cpu/linux_riscv/vm_version_linux_riscv.cpp#L171 [1]
Signed-off-by: Clément Léger <cleger@rivosinc.com>

---
v2:
 - Note: tried sysconf to export it but this is not backed by syscall
   and thus does not allow exporting such information easily.
 - Use arch_get_mmap_end() instead of VA_BITS since it reflects the
   maximum logical address used by the riscv port
 - Change hwprobe key name from RISCV_HWPROBE_KEY_VA_BITS to
   RISCV_HWPROBE_KEY_MAX_ADDRESS
 - Link to v1: https://lore.kernel.org/lkml/20240201140319.360088-1-cleger@rivosinc.com/
---
 Documentation/arch/riscv/hwprobe.rst  | 3 +++
 arch/riscv/include/asm/hwprobe.h      | 2 +-
 arch/riscv/include/uapi/asm/hwprobe.h | 1 +
 arch/riscv/kernel/sys_hwprobe.c       | 4 ++++
 4 files changed, 9 insertions(+), 1 deletion(-)
  

On Tue, Feb 20, 2024, at 6:09 AM, Clément Léger wrote:
> Some userspace applications (OpenJDK for instance) uses the free MSBs
> in pointers to insert additional information for their own logic and
> need to get this information from somewhere. Currently they rely on
> parsing /proc/cpuinfo "mmu=svxx" string to obtain the current value of
> virtual address used bits [1]. Since this reflect the raw MMU mode
> supported, it might differ from the logical one used internally.
> Exporting the maximum mmappable address through hwprobe will allow a
> more stable interface to be used. For that purpose, add a new hwprobe
> key named RISCV_HWPROBE_MAX_KEY which will export the maximum mmappable
> userspace address.
>
> Link: 
> https://github.com/openjdk/jdk/blob/master/src/hotspot/os_cpu/linux_riscv/vm_version_linux_riscv.cpp#L171 
> [1]
> Signed-off-by: Clément Léger <cleger@rivosinc.com>

Reviewed-by: Stefan O'Rear <sorear@fastmail.com>

Ideally, we'd have something arch-independent, but this is a good interface
and simple enough to support in perpetuity.

-s

> ---
> v2:
>  - Note: tried sysconf to export it but this is not backed by syscall
>    and thus does not allow exporting such information easily.
>  - Use arch_get_mmap_end() instead of VA_BITS since it reflects the
>    maximum logical address used by the riscv port
>  - Change hwprobe key name from RISCV_HWPROBE_KEY_VA_BITS to
>    RISCV_HWPROBE_KEY_MAX_ADDRESS
>  - Link to v1: 
> https://lore.kernel.org/lkml/20240201140319.360088-1-cleger@rivosinc.com/
> ---
>  Documentation/arch/riscv/hwprobe.rst  | 3 +++
>  arch/riscv/include/asm/hwprobe.h      | 2 +-
>  arch/riscv/include/uapi/asm/hwprobe.h | 1 +
>  arch/riscv/kernel/sys_hwprobe.c       | 4 ++++
>  4 files changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/arch/riscv/hwprobe.rst 
> b/Documentation/arch/riscv/hwprobe.rst
> index b2bcc9eed9aa..a626aa21ac74 100644
> --- a/Documentation/arch/riscv/hwprobe.rst
> +++ b/Documentation/arch/riscv/hwprobe.rst
> @@ -210,3 +210,6 @@ The following keys are defined:
> 
>  * :c:macro:`RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE`: An unsigned int which
>    represents the size of the Zicboz block in bytes.
> +
> +* :c:macro:`RISCV_HWPROBE_KEY_MAX_USER_ADDRESS`: An unsigned long which
> +  represent the maximum userspace mmappable address.
> diff --git a/arch/riscv/include/asm/hwprobe.h b/arch/riscv/include/asm/hwprobe.h
> index 630507dff5ea..150a9877b0af 100644
> --- a/arch/riscv/include/asm/hwprobe.h
> +++ b/arch/riscv/include/asm/hwprobe.h
> @@ -8,7 +8,7 @@
> 
>  #include <uapi/asm/hwprobe.h>
> 
> -#define RISCV_HWPROBE_MAX_KEY 6
> +#define RISCV_HWPROBE_MAX_KEY 7
> 
>  static inline bool riscv_hwprobe_key_is_valid(__s64 key)
>  {
> diff --git a/arch/riscv/include/uapi/asm/hwprobe.h 
> b/arch/riscv/include/uapi/asm/hwprobe.h
> index 9f2a8e3ff204..a6da434be9da 100644
> --- a/arch/riscv/include/uapi/asm/hwprobe.h
> +++ b/arch/riscv/include/uapi/asm/hwprobe.h
> @@ -67,6 +67,7 @@ struct riscv_hwprobe {
>  #define		RISCV_HWPROBE_MISALIGNED_UNSUPPORTED	(4 << 0)
>  #define		RISCV_HWPROBE_MISALIGNED_MASK		(7 << 0)
>  #define RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE	6
> +#define RISCV_HWPROBE_KEY_MAX_USER_ADDRESS	7
>  /* Increase RISCV_HWPROBE_MAX_KEY when adding items. */
> 
>  /* Flags */
> diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_hwprobe.c
> index a7c56b41efd2..19a47540b4a2 100644
> --- a/arch/riscv/kernel/sys_hwprobe.c
> +++ b/arch/riscv/kernel/sys_hwprobe.c
> @@ -8,6 +8,7 @@
>  #include <asm/cacheflush.h>
>  #include <asm/cpufeature.h>
>  #include <asm/hwprobe.h>
> +#include <asm/processor.h>
>  #include <asm/sbi.h>
>  #include <asm/switch_to.h>
>  #include <asm/uaccess.h>
> @@ -202,6 +203,9 @@ static void hwprobe_one_pair(struct riscv_hwprobe *pair,
>  		if (hwprobe_ext0_has(cpus, RISCV_HWPROBE_EXT_ZICBOZ))
>  			pair->value = riscv_cboz_block_size;
>  		break;
> +	case RISCV_HWPROBE_KEY_MAX_USER_ADDRESS:
> +		pair->value = arch_get_mmap_end(ULONG_MAX, 0, 0);
> +		break;
> 
>  	/*
>  	 * For forward compatibility, unknown keys don't fail the whole
> -- 
> 2.43.0
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
  

On 20/02/2024 17:50, Stefan O'Rear wrote:
> On Tue, Feb 20, 2024, at 6:09 AM, Clément Léger wrote:
>> Some userspace applications (OpenJDK for instance) uses the free MSBs
>> in pointers to insert additional information for their own logic and
>> need to get this information from somewhere. Currently they rely on
>> parsing /proc/cpuinfo "mmu=svxx" string to obtain the current value of
>> virtual address used bits [1]. Since this reflect the raw MMU mode
>> supported, it might differ from the logical one used internally.
>> Exporting the maximum mmappable address through hwprobe will allow a
>> more stable interface to be used. For that purpose, add a new hwprobe
>> key named RISCV_HWPROBE_MAX_KEY which will export the maximum mmappable
>> userspace address.
>>
>> Link: 
>> https://github.com/openjdk/jdk/blob/master/src/hotspot/os_cpu/linux_riscv/vm_version_linux_riscv.cpp#L171 
>> [1]
>> Signed-off-by: Clément Léger <cleger@rivosinc.com>
> 
> Reviewed-by: Stefan O'Rear <sorear@fastmail.com>
> 
> Ideally, we'd have something arch-independent, but this is a good interface
> and simple enough to support in perpetuity.

Hi Stefan,

Indeed while not architecture specific, I did not found anything
relevant in which this information could easily fit. sysconf is actually
mainly compile time constants returned by the libc. And the few non
POSIX sysconf defines (_SC_xx) are actually using either /proc parsing
or the sysinfo syscall which did not changed since kernel 2.3. But maybe
someone out there knows something better suited to export this information.

Thanks,

Clément

> 
> -s
> 
>> ---
>> v2:
>>  - Note: tried sysconf to export it but this is not backed by syscall
>>    and thus does not allow exporting such information easily.
>>  - Use arch_get_mmap_end() instead of VA_BITS since it reflects the
>>    maximum logical address used by the riscv port
>>  - Change hwprobe key name from RISCV_HWPROBE_KEY_VA_BITS to
>>    RISCV_HWPROBE_KEY_MAX_ADDRESS
>>  - Link to v1: 
>> https://lore.kernel.org/lkml/20240201140319.360088-1-cleger@rivosinc.com/
>> ---
>>  Documentation/arch/riscv/hwprobe.rst  | 3 +++
>>  arch/riscv/include/asm/hwprobe.h      | 2 +-
>>  arch/riscv/include/uapi/asm/hwprobe.h | 1 +
>>  arch/riscv/kernel/sys_hwprobe.c       | 4 ++++
>>  4 files changed, 9 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/arch/riscv/hwprobe.rst 
>> b/Documentation/arch/riscv/hwprobe.rst
>> index b2bcc9eed9aa..a626aa21ac74 100644
>> --- a/Documentation/arch/riscv/hwprobe.rst
>> +++ b/Documentation/arch/riscv/hwprobe.rst
>> @@ -210,3 +210,6 @@ The following keys are defined:
>>
>>  * :c:macro:`RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE`: An unsigned int which
>>    represents the size of the Zicboz block in bytes.
>> +
>> +* :c:macro:`RISCV_HWPROBE_KEY_MAX_USER_ADDRESS`: An unsigned long which
>> +  represent the maximum userspace mmappable address.
>> diff --git a/arch/riscv/include/asm/hwprobe.h b/arch/riscv/include/asm/hwprobe.h
>> index 630507dff5ea..150a9877b0af 100644
>> --- a/arch/riscv/include/asm/hwprobe.h
>> +++ b/arch/riscv/include/asm/hwprobe.h
>> @@ -8,7 +8,7 @@
>>
>>  #include <uapi/asm/hwprobe.h>
>>
>> -#define RISCV_HWPROBE_MAX_KEY 6
>> +#define RISCV_HWPROBE_MAX_KEY 7
>>
>>  static inline bool riscv_hwprobe_key_is_valid(__s64 key)
>>  {
>> diff --git a/arch/riscv/include/uapi/asm/hwprobe.h 
>> b/arch/riscv/include/uapi/asm/hwprobe.h
>> index 9f2a8e3ff204..a6da434be9da 100644
>> --- a/arch/riscv/include/uapi/asm/hwprobe.h
>> +++ b/arch/riscv/include/uapi/asm/hwprobe.h
>> @@ -67,6 +67,7 @@ struct riscv_hwprobe {
>>  #define		RISCV_HWPROBE_MISALIGNED_UNSUPPORTED	(4 << 0)
>>  #define		RISCV_HWPROBE_MISALIGNED_MASK		(7 << 0)
>>  #define RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE	6
>> +#define RISCV_HWPROBE_KEY_MAX_USER_ADDRESS	7
>>  /* Increase RISCV_HWPROBE_MAX_KEY when adding items. */
>>
>>  /* Flags */
>> diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_hwprobe.c
>> index a7c56b41efd2..19a47540b4a2 100644
>> --- a/arch/riscv/kernel/sys_hwprobe.c
>> +++ b/arch/riscv/kernel/sys_hwprobe.c
>> @@ -8,6 +8,7 @@
>>  #include <asm/cacheflush.h>
>>  #include <asm/cpufeature.h>
>>  #include <asm/hwprobe.h>
>> +#include <asm/processor.h>
>>  #include <asm/sbi.h>
>>  #include <asm/switch_to.h>
>>  #include <asm/uaccess.h>
>> @@ -202,6 +203,9 @@ static void hwprobe_one_pair(struct riscv_hwprobe *pair,
>>  		if (hwprobe_ext0_has(cpus, RISCV_HWPROBE_EXT_ZICBOZ))
>>  			pair->value = riscv_cboz_block_size;
>>  		break;
>> +	case RISCV_HWPROBE_KEY_MAX_USER_ADDRESS:
>> +		pair->value = arch_get_mmap_end(ULONG_MAX, 0, 0);
>> +		break;
>>
>>  	/*
>>  	 * For forward compatibility, unknown keys don't fail the whole
>> -- 
>> 2.43.0
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv
  

On Tue, Feb 20, 2024 at 12:09:46PM +0100, Clément Léger wrote:
> Some userspace applications (OpenJDK for instance) uses the free MSBs
> in pointers to insert additional information for their own logic and
> need to get this information from somewhere. Currently they rely on
> parsing /proc/cpuinfo "mmu=svxx" string to obtain the current value of
> virtual address used bits [1]. Since this reflect the raw MMU mode
> supported, it might differ from the logical one used internally.
> Exporting the maximum mmappable address through hwprobe will allow a
> more stable interface to be used. For that purpose, add a new hwprobe
> key named RISCV_HWPROBE_MAX_KEY which will export the maximum mmappable
> userspace address.
> 
> Link: https://github.com/openjdk/jdk/blob/master/src/hotspot/os_cpu/linux_riscv/vm_version_linux_riscv.cpp#L171 [1]
> Signed-off-by: Clément Léger <cleger@rivosinc.com>

Doesn't build for nommu:
https://patchwork.kernel.org/project/linux-riscv/patch/20240220110950.871307-1-cleger@rivosinc.com/

Cheers,
Conor.