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Tue, 20 Feb 2024 06:43:10 +0000 From: Alex Soo To: Linus Walleij , Bartosz Golaszewski , Hal Feng , Ley Foon Tan , Jianlong Huang , Emil Renner Berthing , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Drew Fustini Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Paul Walmsley , Palmer Dabbelt , Albert Ou , Alex Soo Subject: [RFC PATCH v2 4/6] pinctrl: starfive: jh8100: add pinctrl driver for sys_gmac domain Date: Tue, 20 Feb 2024 14:42:44 +0800 Message-ID: <20240220064246.467216-5-yuklin.soo@starfivetech.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240220064246.467216-1-yuklin.soo@starfivetech.com> References: <20240220064246.467216-1-yuklin.soo@starfivetech.com> X-ClientProxiedBy: BJXPR01CA0055.CHNPR01.prod.partner.outlook.cn (2406:e500:c211:12::22) To ZQ0PR01MB1302.CHNPR01.prod.partner.outlook.cn (2406:e500:c550:1b::9) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: ZQ0PR01MB1302:EE_|ZQ0PR01MB1239:EE_ X-MS-Office365-Filtering-Correlation-Id: 720988c2-79e5-43d2-3993-08dc31df345b X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Alex Soo --- drivers/pinctrl/starfive/Kconfig | 12 +++ drivers/pinctrl/starfive/Makefile | 1 + .../pinctrl-starfive-jh8100-sys-gmac.c | 93 +++++++++++++++++++ .../starfive/pinctrl-starfive-jh8100.h | 3 + 4 files changed, 109 insertions(+) create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive-jh8100-sys-gmac.c diff --git a/drivers/pinctrl/starfive/Kconfig b/drivers/pinctrl/starfive/Kconfig index d78f161a636c..bc123c0bf35e 100644 --- a/drivers/pinctrl/starfive/Kconfig +++ b/drivers/pinctrl/starfive/Kconfig @@ -82,3 +82,15 @@ config PINCTRL_STARFIVE_JH8100_SYS_WEST This also provides an interface to the GPIO pins not used by other peripherals supporting inputs, outputs, configuring pull-up/pull-down and interrupts on input changes. + +config PINCTRL_STARFIVE_JH8100_SYS_GMAC + tristate "StarFive JH8100 SoC System IOMUX-GMAC pinctrl and GPIO driver" + depends on ARCH_STARFIVE || COMPILE_TEST + depends on OF + select PINCTRL_STARFIVE_JH8100 + default ARCH_STARFIVE + help + Say yes here to support system iomux-gmac pin control on the StarFive JH8100 SoC. + This provides syscon registers to indicate voltage level on SDIO1/GMAC1, to indicate + GMAC1 pads voltage level under different GMAC interface modes, and to configure + GMAC1 interface slew rate. diff --git a/drivers/pinctrl/starfive/Makefile b/drivers/pinctrl/starfive/Makefile index 784465157ae2..236a693a8aef 100644 --- a/drivers/pinctrl/starfive/Makefile +++ b/drivers/pinctrl/starfive/Makefile @@ -9,3 +9,4 @@ obj-$(CONFIG_PINCTRL_STARFIVE_JH7110_AON) += pinctrl-starfive-jh7110-aon.o obj-$(CONFIG_PINCTRL_STARFIVE_JH8100) += pinctrl-starfive-jh8100.o obj-$(CONFIG_PINCTRL_STARFIVE_JH8100_SYS_EAST) += pinctrl-starfive-jh8100-sys-east.o obj-$(CONFIG_PINCTRL_STARFIVE_JH8100_SYS_WEST) += pinctrl-starfive-jh8100-sys-west.o +obj-$(CONFIG_PINCTRL_STARFIVE_JH8100_SYS_GMAC) += pinctrl-starfive-jh8100-sys-gmac.o diff --git a/drivers/pinctrl/starfive/pinctrl-starfive-jh8100-sys-gmac.c b/drivers/pinctrl/starfive/pinctrl-starfive-jh8100-sys-gmac.c new file mode 100644 index 000000000000..be0d238be08c --- /dev/null +++ b/drivers/pinctrl/starfive/pinctrl-starfive-jh8100-sys-gmac.c @@ -0,0 +1,93 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Pinctrl / GPIO driver for StarFive JH8100 SoC sys gmac controller + * + * Copyright (C) 2023-2024 StarFive Technology Co., Ltd. + * Author: Alex Soo + * + */ + +#include +#include +#include +#include +#include + +#include + +#include "../core.h" +#include "../pinmux.h" +#include "../pinconf.h" +#include "pinctrl-starfive-jh8100.h" + +#define JH8100_SYS_G_NGPIO 0 +#define JH8100_SYS_G_GC_BASE -1 +#define JH8100_SYS_G_DOMAIN_NAME "jh8100-sys-gmac" + +#ifdef CONFIG_PM_SLEEP +static int jh8100_sys_gmac_pinctrl_suspend(struct device *dev) +{ + struct jh8100_pinctrl *sfp; + int i; + + sfp = dev_get_drvdata(dev); + if (!sfp) + return -EINVAL; + + for (i = 0; i < sfp->info->nregs; i++) + sfp->jh8100_sys_gmac_regs[i] = readl_relaxed(sfp->base + (i * 4)); + + return pinctrl_force_sleep(sfp->pctl); +} + +static int jh8100_sys_gmac_pinctrl_resume(struct device *dev) +{ + struct jh8100_pinctrl *sfp; + int i; + + sfp = dev_get_drvdata(dev); + if (!sfp) + return -EINVAL; + + for (i = 0; i < sfp->info->nregs; i++) + writel_relaxed(sfp->jh8100_sys_gmac_regs[i], sfp->base + (i * 4)); + + return pinctrl_force_default(sfp->pctl); +} +#endif + +static SIMPLE_DEV_PM_OPS(jh8100_sys_gmac_pinctrl_dev_pm_ops, + jh8100_sys_gmac_pinctrl_suspend, + jh8100_sys_gmac_pinctrl_resume); + +static const struct jh8100_pinctrl_domain_info jh8100_sys_gmac_pinctrl_info = { + .ngpios = JH8100_SYS_G_NGPIO, + .gc_base = JH8100_SYS_G_GC_BASE, + .name = JH8100_SYS_G_DOMAIN_NAME, + .nregs = JH8100_SYS_G_REG_NUM, +}; + +static const struct of_device_id jh8100_sys_gmac_pinctrl_of_match[] = { + { + .compatible = "starfive,jh8100-sys-pinctrl-gmac", + .data = &jh8100_sys_gmac_pinctrl_info, + }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, jh8100_sys_gmac_pinctrl_of_match); + +static struct platform_driver jh8100_sys_gmac_pinctrl_driver = { + .probe = jh8100_pinctrl_probe, + .driver = { + .name = "starfive-jh8100-sys-pinctrl-gmac", +#ifdef CONFIG_PM_SLEEP + .pm = &jh8100_sys_gmac_pinctrl_dev_pm_ops, +#endif + .of_match_table = jh8100_sys_gmac_pinctrl_of_match, + }, +}; +module_platform_driver(jh8100_sys_gmac_pinctrl_driver); + +MODULE_DESCRIPTION("Pinctrl driver for StarFive JH8100 SoC sys gmac controller"); +MODULE_AUTHOR("Alex Soo "); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/pinctrl/starfive/pinctrl-starfive-jh8100.h b/drivers/pinctrl/starfive/pinctrl-starfive-jh8100.h index 92d3b5d6de40..4652885feaa2 100644 --- a/drivers/pinctrl/starfive/pinctrl-starfive-jh8100.h +++ b/drivers/pinctrl/starfive/pinctrl-starfive-jh8100.h @@ -15,9 +15,11 @@ #define JH8100_SYS_W_DOMAIN_NAME "jh8100-sys-west" #define JH8100_SYS_E_DOMAIN_NAME "jh8100-sys-east" +#define JH8100_SYS_G_DOMAIN_NAME "jh8100-sys-gmac" #define JH8100_SYS_W_REG_NUM 44 #define JH8100_SYS_E_REG_NUM 116 +#define JH8100_SYS_G_REG_NUM 19 #define JH8100_SYS_W_GPO_PDA_00_15_CFG 0x074 #define JH8100_SYS_E_GPO_PDA_00_47_CFG 0x114 @@ -34,6 +36,7 @@ struct jh8100_pinctrl { const struct jh8100_pinctrl_domain_info *info; unsigned int jh8100_sys_west_regs[JH8100_SYS_W_REG_NUM]; unsigned int jh8100_sys_east_regs[JH8100_SYS_E_REG_NUM]; + unsigned int jh8100_sys_gmac_regs[JH8100_SYS_G_REG_NUM]; /* wakeup */ int wakeup_gpio; int wakeup_irq;