Message ID | 20240219113745.92538-3-thomas.bourgoin@foss.st.com |
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State | New |
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Mon, 19 Feb 2024 12:39:52 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 700C125AEEA; Mon, 19 Feb 2024 12:39:19 +0100 (CET) Received: from localhost (10.201.22.242) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 19 Feb 2024 12:39:19 +0100 From: Thomas Bourgoin <thomas.bourgoin@foss.st.com> To: Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Maxime Coquelin <mcoquelin.stm32@gmail.com>, Alexandre Torgue <alexandre.torgue@foss.st.com> CC: Thomas Bourgoin <thomas.bourgoin@foss.st.com>, <devicetree@vger.kernel.org>, <linux-stm32@st-md-mailman.stormreply.com>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, Lionel Debieve <lionel.debieve@foss.st.com> Subject: [PATCH 2/3] ARM: dts: stm32: enable CRC on stm32mp135f-dk Date: Mon, 19 Feb 2024 12:37:44 +0100 Message-ID: <20240219113745.92538-3-thomas.bourgoin@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240219113745.92538-1-thomas.bourgoin@foss.st.com> References: <20240219113745.92538-1-thomas.bourgoin@foss.st.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: EQNCAS1NODE4.st.com (10.75.129.82) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-19_08,2024-02-19_01,2023-05-22_02 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791327398283519216 X-GMAIL-MSGID: 1791327398283519216 |
Series |
Enable the CRC and CRYP IP on STM32MP135F-DK board.
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Commit Message
Thomas Bourgoin
Feb. 19, 2024, 11:37 a.m. UTC
From: Lionel Debieve <lionel.debieve@foss.st.com> Enable Cyclic redundancy check on stm32mp135f-dk. Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com> Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> --- arch/arm/boot/dts/st/stm32mp135f-dk.dts | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/st/stm32mp135f-dk.dts b/arch/arm/boot/dts/st/stm32mp135f-dk.dts index eea740d097c7..a7b1b2ca9d0b 100644 --- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts +++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts @@ -93,6 +93,10 @@ channel@12 { }; }; +&crc1 { + status = "okay"; +}; + &i2c1 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c1_pins_a>;