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Mon, 19 Feb 2024 12:39:29 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 61E8525AEE8; Mon, 19 Feb 2024 12:38:57 +0100 (CET) Received: from localhost (10.201.22.242) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 19 Feb 2024 12:38:57 +0100 From: Thomas Bourgoin To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue CC: Thomas Bourgoin , , , , , Lionel Debieve Subject: [PATCH 1/3] ARM: dts: stm32: add CRC on stm32mp131 Date: Mon, 19 Feb 2024 12:37:43 +0100 Message-ID: <20240219113745.92538-2-thomas.bourgoin@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240219113745.92538-1-thomas.bourgoin@foss.st.com> References: <20240219113745.92538-1-thomas.bourgoin@foss.st.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: EQNCAS1NODE4.st.com (10.75.129.82) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-19_08,2024-02-19_01,2023-05-22_02 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791327298067806308 X-GMAIL-MSGID: 1791327298067806308 From: Lionel Debieve The Cyclic redundancy check calculation unit (CRC) peripheral offers a CRC-based operation (CRC32/CRC32C) used to verify data transmission or storage integrity. This peripheral is integrated in stm32mp131 and can be default enabled. Signed-off-by: Lionel Debieve Signed-off-by: Thomas Bourgoin --- arch/arm/boot/dts/st/stm32mp131.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi index b04d24c939c3..3900f32da797 100644 --- a/arch/arm/boot/dts/st/stm32mp131.dtsi +++ b/arch/arm/boot/dts/st/stm32mp131.dtsi @@ -1315,6 +1315,13 @@ sdmmc2: mmc@58007000 { status = "disabled"; }; + crc1: crc@58009000 { + compatible = "st,stm32f7-crc"; + reg = <0x58009000 0x400>; + clocks = <&rcc CRC1>; + status = "disabled"; + }; + usbh_ohci: usb@5800c000 { compatible = "generic-ohci"; reg = <0x5800c000 0x1000>;