diff mbox series

[v10,21/27] KVM: x86: Save and reload SSP to/from SMRAM

Message ID	20240219074733.122080-22-weijiang.yang@intel.com
State	New
Headers	Received-SPF: pass (google.com: domain of linux-kernel+bounces-70888-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) client-ip=147.75.199.223; From: Yang Weijiang <weijiang.yang@intel.com> To: seanjc@google.com, pbonzini@redhat.com, dave.hansen@intel.com, x86@kernel.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: peterz@infradead.org, chao.gao@intel.com, rick.p.edgecombe@intel.com, mlevitsk@redhat.com, john.allen@amd.com, weijiang.yang@intel.com Subject: [PATCH v10 21/27] KVM: x86: Save and reload SSP to/from SMRAM Date: Sun, 18 Feb 2024 23:47:27 -0800 Message-ID: <20240219074733.122080-22-weijiang.yang@intel.com> In-Reply-To: <20240219074733.122080-1-weijiang.yang@intel.com> References: <20240219074733.122080-1-weijiang.yang@intel.com> Precedence: bulk MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-getmail-retrieved-from-mailbox: INBOX
Series	Enable CET Virtualization \| [v10,00/27] Enable CET Virtualization [v10,01/27] x86/fpu/xstate: Always preserve non-user xfeatures/flags in __state_perm [v10,02/27] x86/fpu/xstate: Refine CET user xstate bit enabling [v10,03/27] x86/fpu/xstate: Add CET supervisor mode state support [v10,04/27] x86/fpu/xstate: Introduce XFEATURE_MASK_KERNEL_DYNAMIC xfeature set [v10,05/27] x86/fpu/xstate: Introduce fpu_guest_cfg for guest FPU configuration [v10,06/27] x86/fpu/xstate: Create guest fpstate with guest specific config [v10,07/27] x86/fpu/xstate: Warn if kernel dynamic xfeatures detected in normal fpstate [v10,08/27] KVM: x86: Rework cpuid_get_supported_xcr0() to operate on vCPU data [v10,09/27] KVM: x86: Rename kvm_{g,s}et_msr()* to menifest emulation operations [v10,10/27] KVM: x86: Refine xsave-managed guest register/MSR reset handling [v10,11/27] KVM: x86: Add kvm_msr_{read,write}() helpers [v10,12/27] KVM: x86: Report XSS as to-be-saved if there are supported features [v10,13/27] KVM: x86: Refresh CPUID on write to guest MSR_IA32_XSS [v10,14/27] KVM: x86: Initialize kvm_caps.supported_xss [v10,15/27] KVM: x86: Load guest FPU state when access XSAVE-managed MSRs [v10,16/27] KVM: x86: Add fault checks for guest CR4.CET setting [v10,17/27] KVM: x86: Report KVM supported CET MSRs as to-be-saved [v10,18/27] KVM: VMX: Introduce CET VMCS fields and control bits [v10,19/27] KVM: x86: Use KVM-governed feature framework to track "SHSTK/IBT enabled" [v10,20/27] KVM: VMX: Emulate read and write to CET MSRs [v10,21/27] KVM: x86: Save and reload SSP to/from SMRAM [v10,22/27] KVM: VMX: Set up interception for CET MSRs [v10,23/27] KVM: VMX: Set host constant supervisor states to VMCS fields [v10,24/27] KVM: x86: Enable CET virtualization for VMX and advertise to userspace [v10,25/27] KVM: nVMX: Introduce new VMX_BASIC bit for event error_code delivery to L1 [v10,26/27] KVM: nVMX: Enable CET support for nested guest [v10,27/27] KVM: x86: Don't emulate instructions guarded by CET

Commit Message

Yang, Weijiang Feb. 19, 2024, 7:47 a.m. UTC

  Save CET SSP to SMRAM on SMI and reload it on RSM. KVM emulates HW arch
behavior when guest enters/leaves SMM mode,i.e., save registers to SMRAM
at the entry of SMM and reload them at the exit to SMM. Per SDM, SSP is
one of such registers on 64-bit Arch, and add the support for SSP. Note,
on 32-bit Arch, SSP is not defined in SMRAM, so fail 32-bit CET guest
launch.

Suggested-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
---
 arch/x86/kvm/cpuid.c | 11 +++++++++++
 arch/x86/kvm/smm.c   |  8 ++++++++
 arch/x86/kvm/smm.h   |  2 +-
 3 files changed, 20 insertions(+), 1 deletion(-)

diff mbox series

Patch

diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 2bb1931103ad..c0e13040e35b 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -149,6 +149,17 @@  static int kvm_check_cpuid(struct kvm_vcpu *vcpu,
 		if (vaddr_bits != 48 && vaddr_bits != 57 && vaddr_bits != 0)
 			return -EINVAL;
 	}
+	/*
+	 * Prevent 32-bit guest launch if shadow stack is exposed as SSP
+	 * state is not defined for 32-bit SMRAM.
+	 */
+	best = cpuid_entry2_find(entries, nent, 0x80000001,
+				 KVM_CPUID_INDEX_NOT_SIGNIFICANT);
+	if (best && !(best->edx & F(LM))) {
+		best = cpuid_entry2_find(entries, nent, 0x7, 0);
+		if (best && (best->ecx & F(SHSTK)))
+			return -EINVAL;
+	}
 
 	/*
 	 * Exposing dynamic xfeatures to the guest requires additional
diff --git a/arch/x86/kvm/smm.c b/arch/x86/kvm/smm.c
index 45c855389ea7..7aac9c54c353 100644
--- a/arch/x86/kvm/smm.c
+++ b/arch/x86/kvm/smm.c
@@ -275,6 +275,10 @@  static void enter_smm_save_state_64(struct kvm_vcpu *vcpu,
 	enter_smm_save_seg_64(vcpu, &smram->gs, VCPU_SREG_GS);
 
 	smram->int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
+
+	if (guest_can_use(vcpu, X86_FEATURE_SHSTK))
+		KVM_BUG_ON(kvm_msr_read(vcpu, MSR_KVM_SSP, &smram->ssp),
+			   vcpu->kvm);
 }
 #endif
 
@@ -564,6 +568,10 @@  static int rsm_load_state_64(struct x86_emulate_ctxt *ctxt,
 	static_call(kvm_x86_set_interrupt_shadow)(vcpu, 0);
 	ctxt->interruptibility = (u8)smstate->int_shadow;
 
+	if (guest_can_use(vcpu, X86_FEATURE_SHSTK))
+		KVM_BUG_ON(kvm_msr_write(vcpu, MSR_KVM_SSP, smstate->ssp),
+			   vcpu->kvm);
+
 	return X86EMUL_CONTINUE;
 }
 #endif
diff --git a/arch/x86/kvm/smm.h b/arch/x86/kvm/smm.h
index a1cf2ac5bd78..1e2a3e18207f 100644
--- a/arch/x86/kvm/smm.h
+++ b/arch/x86/kvm/smm.h
@@ -116,8 +116,8 @@  struct kvm_smram_state_64 {
 	u32 smbase;
 	u32 reserved4[5];
 
-	/* ssp and svm_* fields below are not implemented by KVM */
 	u64 ssp;
+	/* svm_* fields below are not implemented by KVM */
 	u64 svm_guest_pat;
 	u64 svm_host_efer;
 	u64 svm_host_cr4;