From patchwork Mon Feb 19 07:47:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Yang, Weijiang" X-Patchwork-Id: 202937 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp1136720dyc; Sun, 18 Feb 2024 23:55:05 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUbEN4RZXVD8tJDJapteKkVMr+L3OyB8Y+n8I+eMIgCpuzhzRRN/ySz7drvuvTi4jJFjtxtDRq/hpka/j2dvZe13lPhxQ== X-Google-Smtp-Source: AGHT+IEQp4uzS1ki17EQ3KDyif+3Q6Z/TxQc89KeEsNIBNkNCpueDwlug/kZGZqi787vPa6uqS8b X-Received: by 2002:a05:6214:1d01:b0:68f:1aa5:f80a with SMTP id e1-20020a0562141d0100b0068f1aa5f80amr18267803qvd.59.1708329304796; Sun, 18 Feb 2024 23:55:04 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708329304; cv=pass; d=google.com; s=arc-20160816; b=GJvwqKtDe4cp2Kyow39OJgqjKIByVL9WOn5iKj7pQSfrwATbJgx7rCrWOPo82bMzfe 1f3XAd14jl2F8TbaPkLUqwsxdpi8McBmK3WgFLCUmGyDvcDvE3lekzlvSlqcfrhuW4L7 bh3fpyZfFvUiT1bQa3ExKjl/wgSU3DinuPPfYM8BJPqFWDXLQMsrJnog9K2LLWmtFA95 ECHlr0hZFhBw3AdUbBZBySUJwnAJU3GbaukH5MyK3GnszMjK6rRQ/SkIxldxIQQX0byd 9OMROJAOVEOohWjVuQxKfqDyTfL+1aEsc0V8vCZphAOFaUSycvG4cvH7gSgzfG+1P04D oUhw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=XIMR37QDxSHgndhJVmz2hUbMPfl3C4b54gHJk55sHLQ=; fh=6bYtQoKQxNJSYrJA1a9vseXH6qHZpRYO7L/7krtpXA0=; b=TPKpmu6gV+P4bAT4lRWvsFQWypEIBta1sNq3bcZZbAQiGjKQgcCH4YQr9SPRwHfwxa wCPgqxkILwIocHjl+N9KHU/rPcmiEm2QhVhFTX/nU5iEORhtIL6wSIH7VzUorefiM91P B5x4Zhn/zljIuz8zbgtjRMeU0N0dJw96fPbGP6tiI0ao18n0xiyfSMJlMLE2PuWda9dt qalA96JWCV72Tzhy/9x2g82jFro/B2WJd4e/GdRVk8SuVpIBdsUXpaMQ0rhYThjx0f3N c/ErZpnSBH0yYJkdZ67GF2TUounV8BKeRQgFHcLo9JrX1o249KDF+PznTHsoxgDDLnMX wV+g==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=erLHhcPE; arc=pass (i=1 spf=pass spfdomain=intel.com dkim=pass dkdomain=intel.com dmarc=pass fromdomain=intel.com); spf=pass (google.com: domain of linux-kernel+bounces-70875-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-70875-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. [147.75.199.223]) by mx.google.com with ESMTPS id gw5-20020a0562140f0500b0068cd2d3420csi5807415qvb.169.2024.02.18.23.55.04 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 Feb 2024 23:55:04 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-70875-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) client-ip=147.75.199.223; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=erLHhcPE; arc=pass (i=1 spf=pass spfdomain=intel.com dkim=pass dkdomain=intel.com dmarc=pass fromdomain=intel.com); spf=pass (google.com: domain of linux-kernel+bounces-70875-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-70875-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id 9303F1C21CA7 for ; Mon, 19 Feb 2024 07:55:04 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 85B09381DA; Mon, 19 Feb 2024 07:47:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="erLHhcPE" Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5C1BC2C6A5; Mon, 19 Feb 2024 07:47:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.16 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708328872; cv=none; b=Rjepv+AHHVSXUJ1jN4a5Z4WI2jiVfugb/IoaSeUHswUecBahEG/Qu7o0cLsTRnC2bGFaAY6dAo1cSupRXa3r/UNIu+Qy2kVWxAx145qPo7AGdUh5U6DCF/tWnWkyPLftdpFYn1rS4RY65aKxpPQM9UKlYfj0aI8VzYAE81fLXvs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708328872; c=relaxed/simple; bh=LLhrBOymq6NYTEUsoYOVmixfi9tT5OVBKgVwc5iax14=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=vB/NL/NSV1CuM3GfzeCBfIL9wvtWUHtSfGBerFgXPCeYqiGM5uZ/N9p/77Mvqf7nmnRhwh9u8zmIwQdD+4vF61pwduFe1vTclHz6rg+SV32+zxo//zyLHvuq6jtuPlWFM28vtOlrQre9p8tAdoq4ti+dvUvC93tGXMaftYcxwzM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=erLHhcPE; arc=none smtp.client-ip=198.175.65.16 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1708328870; x=1739864870; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=LLhrBOymq6NYTEUsoYOVmixfi9tT5OVBKgVwc5iax14=; b=erLHhcPE0ozar76TYW+++JNk/DEeIdbmnd1R/Dh0IOuSYm74NeT6VqK2 An3VBmbx/mk5S1S0zX8BDvqrDB9e5nx7oom8F8nBui+SZx7psI7IjLREE LjXRjT0M6A3/dsH0QFHAn69x1wu1S1xBX58YcjGR99lKsMwtkKiUxhDAW jFhOgvYSVs0PPNj8eGKByCXoZzoLh8/EzzSjYMT6DMicBrz8p2HUCHuAC Hyb6abbAA4cXLMYxaz/JeBgUHXrETAMcA65dSRqk6M7HMScbr9EPRX1+i 5gIGl8UKhY609SeymFVL+ENcYgkVymseNLSdlhxxYrW7hpe58pO0jjQ9a A==; X-IronPort-AV: E=McAfee;i="6600,9927,10988"; a="2535077" X-IronPort-AV: E=Sophos;i="6.06,170,1705392000"; d="scan'208";a="2535077" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Feb 2024 23:47:44 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10988"; a="826966087" X-IronPort-AV: E=Sophos;i="6.06,170,1705392000"; d="scan'208";a="826966087" Received: from jf.jf.intel.com (HELO jf.intel.com) ([10.165.9.183]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Feb 2024 23:47:43 -0800 From: Yang Weijiang To: seanjc@google.com, pbonzini@redhat.com, dave.hansen@intel.com, x86@kernel.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: peterz@infradead.org, chao.gao@intel.com, rick.p.edgecombe@intel.com, mlevitsk@redhat.com, john.allen@amd.com, weijiang.yang@intel.com Subject: [PATCH v10 10/27] KVM: x86: Refine xsave-managed guest register/MSR reset handling Date: Sun, 18 Feb 2024 23:47:16 -0800 Message-ID: <20240219074733.122080-11-weijiang.yang@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240219074733.122080-1-weijiang.yang@intel.com> References: <20240219074733.122080-1-weijiang.yang@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791313108990280176 X-GMAIL-MSGID: 1791313108990280176 Tweak the code a bit to facilitate resetting more xstate components in the future, e.g., CET's xstate-managed MSRs. No functional change intended. Suggested-by: Chao Gao Signed-off-by: Yang Weijiang Reviewed-by: Chao Gao --- arch/x86/kvm/x86.c | 30 +++++++++++++++++++++++++++--- 1 file changed, 27 insertions(+), 3 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 10847e1cc413..5a9c07751c0e 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -12217,11 +12217,27 @@ void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu) static_branch_dec(&kvm_has_noapic_vcpu); } +#define XSTATE_NEED_RESET_MASK (XFEATURE_MASK_BNDREGS | \ + XFEATURE_MASK_BNDCSR) + +static bool kvm_vcpu_has_xstate(unsigned long xfeature) +{ + switch (xfeature) { + case XFEATURE_MASK_BNDREGS: + case XFEATURE_MASK_BNDCSR: + return kvm_cpu_cap_has(X86_FEATURE_MPX); + default: + return false; + } +} + void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event) { struct kvm_cpuid_entry2 *cpuid_0x1; unsigned long old_cr0 = kvm_read_cr0(vcpu); + DECLARE_BITMAP(reset_mask, 64); unsigned long new_cr0; + unsigned int i; /* * Several of the "set" flows, e.g. ->set_cr0(), read other registers @@ -12274,7 +12290,12 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event) kvm_async_pf_hash_reset(vcpu); vcpu->arch.apf.halted = false; - if (vcpu->arch.guest_fpu.fpstate && kvm_mpx_supported()) { + bitmap_from_u64(reset_mask, (kvm_caps.supported_xcr0 | + kvm_caps.supported_xss) & + XSTATE_NEED_RESET_MASK); + + if (vcpu->arch.guest_fpu.fpstate && + !bitmap_empty(reset_mask, XFEATURE_MAX)) { struct fpstate *fpstate = vcpu->arch.guest_fpu.fpstate; /* @@ -12284,8 +12305,11 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event) if (init_event) kvm_put_guest_fpu(vcpu); - fpstate_clear_xstate_component(fpstate, XFEATURE_BNDREGS); - fpstate_clear_xstate_component(fpstate, XFEATURE_BNDCSR); + for_each_set_bit(i, reset_mask, XFEATURE_MAX) { + if (!kvm_vcpu_has_xstate(i)) + continue; + fpstate_clear_xstate_component(fpstate, i); + } if (init_event) kvm_load_guest_fpu(vcpu);