From patchwork Fri Feb 23 21:21:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 205698 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:a81b:b0:108:e6aa:91d0 with SMTP id bq27csp851811dyb; Fri, 23 Feb 2024 13:22:48 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWosw4YyucPqFRWdegiJXHluWWIxKw6Imc2hdvbSQJp7A1/v0267rrFKPdWjZ0np82fwooT/KDrLvX4VE85Za0hRm7IVw== X-Google-Smtp-Source: AGHT+IFowc8+IvqRe4jwjpBeBg72z4lDbC5kQ7QYWbbbSoD3FTL5TJaTwe4tsKtLd+aZNW/PhtGN X-Received: by 2002:a17:906:3c18:b0:a3e:d5ac:9995 with SMTP id h24-20020a1709063c1800b00a3ed5ac9995mr483101ejg.59.1708723368022; Fri, 23 Feb 2024 13:22:48 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708723368; cv=pass; d=google.com; s=arc-20160816; b=psQYM3J/HLtIiI3SRMOJLjIVcQgB8JnodoXomWtizl0qSxdIDktlNPj63uf6SDMrVN C67uU8un+hiOU11UNYckSMQfstBLOm44f1nvKY+785lIab95augf/f7pIWMxpLW9bVla zF2KMMPBGQhvM1VGn6uWEbhFC/aU8nUnwm7l0aBjNy3AKGH2PEYe7My1WLxktKd49SAr l7HTJQB+UjrbWLflWLFRO9skrZtSflWjiKnSem/Awl1kjNSbD2kuen96Qpv0prnvJwXU aj1kBXVgLncU2Lt7fyPsdHkYrks6OxlPnoo9hUmMxXoi/34XJHgU3MJqM2GEb0ffNcvI wX5A== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=cw7Sb/UbJBB5CItex8fl5k2pXl6SWFJwePpg/cbm8hY=; fh=P2ypV4a0B+FFFLdEyJ44SkAQ5vFUs7NT3djj0zs9YQE=; b=UPMpEpTncg0IhG3y578EGO1mEC9lC7N/JfnnFl0sYR44GQZGt5Sb8cIQY4wRkA4Wy0 UlZ88AYCRM5LEhb6CDKmc0D1OzCrN7LGCy5eRgkYsbr4vvmlNZbrabLH5pyXei3SyKNP zCcGcZyqUyN4H2+rN0zelO7HGaAS3rIy3GVqSwUV/P54dw0pUADUjea6zUnIHK9sKD7t bXQD3ZxMYX5wHvs6xgU1NLWRqCSATOWFgoNlVthWaf59WUszT/WfzszW4PMfUmx1/PY/ MPKORhq2ZlcaZUSMv2S7zXgnt3m2X+cofw8DrpRvnoxt+dDlH/n9Ov+o+Vi6ww4X3JSA oxdw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Pmut1iGu; arc=pass (i=1 spf=pass spfdomain=linaro.org dkim=pass dkdomain=linaro.org dmarc=pass fromdomain=linaro.org); spf=pass (google.com: domain of linux-kernel+bounces-79198-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-79198-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. [2604:1380:4601:e00::3]) by mx.google.com with ESMTPS id hd17-20020a170907969100b00a3e3633cf8esi6392443ejc.435.2024.02.23.13.22.47 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Feb 2024 13:22:48 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-79198-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) client-ip=2604:1380:4601:e00::3; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Pmut1iGu; arc=pass (i=1 spf=pass spfdomain=linaro.org dkim=pass dkdomain=linaro.org dmarc=pass fromdomain=linaro.org); spf=pass (google.com: domain of linux-kernel+bounces-79198-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-79198-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 666B41F24CE3 for ; Fri, 23 Feb 2024 21:22:47 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id AD51914DFCB; Fri, 23 Feb 2024 21:21:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Pmut1iGu" Received: from mail-ej1-f45.google.com (mail-ej1-f45.google.com [209.85.218.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0797D1493BB for ; Fri, 23 Feb 2024 21:21:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708723314; cv=none; b=Ci3iYlXoINpILVUKpTWeJdnJKqDrI7D2A7cRcDt23I0W9CsEqN3iwWBD5D2URRNi2rvV2E0okpXz9f91vzSdNZEx2oIDphwkXC6E3j8lgZI3YCHAmevxH09B043cvm/FsXOP3xM1mkrIMNBU8jm/MqS7yoPZqOmMtjBODTT+YIU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708723314; c=relaxed/simple; bh=XoBTIW3JvxqyhOVBniaSAgJX/HfeR30N24/h9GELtao=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=gRKPb7gPp3Uri88PXrRTdnUrZUW/36dc6paQxeUUKe7uNYsO611dh9rQ6YiVUHi/eCAXZqclGiHmQ7v4Qdnk0gxLt9+IF+rWY6EiJa/ZGSMdwk+ZH78sHa12Bl2iQ98uCXogOJA+QCZlhUmTGnpc9d1evmq8HJmTP9MZ2bj9WsI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=Pmut1iGu; arc=none smtp.client-ip=209.85.218.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Received: by mail-ej1-f45.google.com with SMTP id a640c23a62f3a-a3e6f79e83dso108555866b.2 for ; Fri, 23 Feb 2024 13:21:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1708723311; x=1709328111; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=cw7Sb/UbJBB5CItex8fl5k2pXl6SWFJwePpg/cbm8hY=; b=Pmut1iGuYC+Be1+IOuPzZfMwZ7jJ1MLiVve6RtypjUN4IuM0aMlMhY2jgkOFJYxG6S JQwPbhwM6TSuVTSsL2XuN7W6uFG0QVzMs/zSbahDvajrzsQU9tEbG3vb/Dog5BDILELO YfhhVWcKu5cf+LxpJYBscNDKYlJhcOvf3boXWyazE/0fpfovd8qwV+rL/7XYEIAgqKCf GlvVUq+Jt14mNq0h2DhfmiIKcIEl2mBGWdQCnZzHkKYotH/ykSbmjz+bVlHJn2Jiol8N eQ0/D2NsNPI6HXa7oJsF+sxA+l/HuI3RI0NY19Zaont6MLJ/E6OHBPOAIGO76Z8OFXTc 5NoA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1708723311; x=1709328111; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cw7Sb/UbJBB5CItex8fl5k2pXl6SWFJwePpg/cbm8hY=; b=mhzNqmtrF4VTzC8qLLdCxfbg5A3SufPKyE0DNitOXVzKbMSPv5xF5yoCPPUv73LA+l 8Cbw8NVosn5IfabXho3Qw/dG4HaxSZNR82TdcswJvF8VumtjZGNzkTx7Zo3b6BiEf0iE 8u9HqC8QSVQ/KEDTkn+xoOnNDVBtl8u8bozNhiiVKJcBEUrPbaLd9qy0/Pzt9syYTj6k RlojZHNAvy0DDMMcSosTIs1cbccLKIUKa7atGyqOvjJRifOmfnB5kzH7edhBzHRZAbg5 NeGYRS/xvFDiJOleVsUvekwgD9woj/X/9MTUA/qVk8feMOf+5BEV4As0qD88oCD0rV9p +n0g== X-Forwarded-Encrypted: i=1; AJvYcCUOAymD6n9F1KinKmnHghv1ofaBeeYN322dMkzHGeP1JA3WNufLw+ff160QEzTtpLml4ubb7Ml5aD59G+vASJojKh1LIGqcN4ThnQAG X-Gm-Message-State: AOJu0Yy21oT9rtOzhYVFF1EEojTQyRMLvWJwPC+RQDsNFRVDzokLKctd Hty1kEAxO5RlLblx7uIDg/9BrREcFYcIcCHrLSqIg2MxM5TjvTMC6YCXqkxv+BY= X-Received: by 2002:a17:906:31d8:b0:a3e:7ef1:8c91 with SMTP id f24-20020a17090631d800b00a3e7ef18c91mr534343ejf.77.1708723311427; Fri, 23 Feb 2024 13:21:51 -0800 (PST) Received: from [10.167.154.1] (078088045141.garwolin.vectranet.pl. [78.88.45.141]) by smtp.gmail.com with ESMTPSA id mj8-20020a170906af8800b00a3ee9305b02sm4091226ejb.20.2024.02.23.13.21.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Feb 2024 13:21:50 -0800 (PST) From: Konrad Dybcio Date: Fri, 23 Feb 2024 22:21:38 +0100 Subject: [PATCH v2 2/7] clk: qcom: clk-alpha-pll: Add HUAYRA_2290 support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240219-topic-rb1_gpu-v2-2-2d3d6a0db040@linaro.org> References: <20240219-topic-rb1_gpu-v2-0-2d3d6a0db040@linaro.org> In-Reply-To: <20240219-topic-rb1_gpu-v2-0-2d3d6a0db040@linaro.org> To: Will Deacon , Robin Murphy , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter Cc: Marijn Suijten , linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1708723303; l=4284; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=XoBTIW3JvxqyhOVBniaSAgJX/HfeR30N24/h9GELtao=; b=iyeNEH8NgtNuGp9PiKFfHoNtEBU5HspXwnqNiwJ8nEArbl48Sx5/eLvJnsYlPRaxxqIXmjPoq 9KipGQ6ODS0B4x/m28GpVJ7dr7AF+xtGxfu/XHdsgaX67wqlG2hF/vM X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791726314291183799 X-GMAIL-MSGID: 1791726314291183799 Commit 134b55b7e19f ("clk: qcom: support Huayra type Alpha PLL") introduced an entry to the alpha offsets array, but diving into QCM2290 downstream and some documentation, it turned out that the name Huayra apparently has been used quite liberally across many chips, even with noticeably different hardware. Introduce another set of offsets and a new configure function for the Huayra PLL found on QCM2290. This is required e.g. for the consumers of GPUCC_PLL0 to properly start. Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/clk/qcom/clk-alpha-pll.c | 47 ++++++++++++++++++++++++++++++++++++++++ drivers/clk/qcom/clk-alpha-pll.h | 3 +++ 2 files changed, 50 insertions(+) diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c index 8a412ef47e16..82b71f24ee7d 100644 --- a/drivers/clk/qcom/clk-alpha-pll.c +++ b/drivers/clk/qcom/clk-alpha-pll.c @@ -83,6 +83,19 @@ const u8 clk_alpha_pll_regs[][PLL_OFF_MAX_REGS] = { [PLL_OFF_TEST_CTL_U] = 0x20, [PLL_OFF_STATUS] = 0x24, }, + [CLK_ALPHA_PLL_TYPE_HUAYRA_2290] = { + [PLL_OFF_L_VAL] = 0x04, + [PLL_OFF_ALPHA_VAL] = 0x08, + [PLL_OFF_USER_CTL] = 0x0c, + [PLL_OFF_CONFIG_CTL] = 0x10, + [PLL_OFF_CONFIG_CTL_U] = 0x14, + [PLL_OFF_CONFIG_CTL_U1] = 0x18, + [PLL_OFF_TEST_CTL] = 0x1c, + [PLL_OFF_TEST_CTL_U] = 0x20, + [PLL_OFF_TEST_CTL_U1] = 0x24, + [PLL_OFF_OPMODE] = 0x28, + [PLL_OFF_STATUS] = 0x38, + }, [CLK_ALPHA_PLL_TYPE_BRAMMO] = { [PLL_OFF_L_VAL] = 0x04, [PLL_OFF_ALPHA_VAL] = 0x08, @@ -779,6 +792,40 @@ static long clk_alpha_pll_round_rate(struct clk_hw *hw, unsigned long rate, return clamp(rate, min_freq, max_freq); } +void clk_huayra_2290_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, + const struct alpha_pll_config *config) +{ + u32 val; + + clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val); + clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val); + clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val); + clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val); + clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val); + clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val); + clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l); + clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha); + clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val); + + /* Set PLL_BYPASSNL */ + regmap_update_bits(regmap, PLL_MODE(pll), PLL_BYPASSNL, PLL_BYPASSNL); + regmap_read(regmap, PLL_MODE(pll), &val); + + /* Wait 5 us between setting BYPASS and deasserting reset */ + udelay(5); + + /* Take PLL out from reset state */ + regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N); + regmap_read(regmap, PLL_MODE(pll), &val); + + /* Wait 50us for PLL_LOCK_DET bit to go high */ + usleep_range(50, 55); + + /* Enable PLL output */ + regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL); +} +EXPORT_SYMBOL(clk_huayra_2290_pll_configure); + static unsigned long alpha_huayra_pll_calc_rate(u64 prate, u32 l, u32 a) { diff --git a/drivers/clk/qcom/clk-alpha-pll.h b/drivers/clk/qcom/clk-alpha-pll.h index fb6d50263bb9..d1cd52158c17 100644 --- a/drivers/clk/qcom/clk-alpha-pll.h +++ b/drivers/clk/qcom/clk-alpha-pll.h @@ -15,6 +15,7 @@ enum { CLK_ALPHA_PLL_TYPE_DEFAULT, CLK_ALPHA_PLL_TYPE_HUAYRA, + CLK_ALPHA_PLL_TYPE_HUAYRA_2290, CLK_ALPHA_PLL_TYPE_BRAMMO, CLK_ALPHA_PLL_TYPE_FABIA, CLK_ALPHA_PLL_TYPE_TRION, @@ -191,6 +192,8 @@ extern const struct clk_ops clk_alpha_pll_rivian_evo_ops; void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config); +void clk_huayra_2290_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, + const struct alpha_pll_config *config); void clk_fabia_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config); void clk_trion_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,