diff mbox series

[v7,2/4] arm64: dts: ti: k3-am64-main: Add ICSSG IEP nodes

Message ID 20240219-add-am64-som-v7-2-0e6e95b0a05d@solid-run.com
State New
Headers
Series arm64: dts: add description for solidrun am642 som and hummingboard evb |

Commit Message

Josua Mayer Feb. 19, 2024, 3:03 p.m. UTC 
  From: Suman Anna <s-anna@ti.com>

The ICSSG IP on AM64x SoCs have two Industrial Ethernet Peripherals (IEPs)
to manage/generate Industrial Ethernet functions such as time stamping.
Each IEP sub-module is sourced from an internal clock mux that can be
derived from either of the IP instance's ICSSG_IEP_GCLK or from another
internal ICSSG CORE_CLK mux. Add both the IEP nodes for both the ICSSG
instances. The IEP clock is currently configured to be derived
indirectly from the ICSSG_ICLK running at 250 MHz.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
 arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

Comments

Vignesh Raghavendra Feb. 27, 2024, 2:12 p.m. UTC | #1 
On 19/02/24 20:33, Josua Mayer wrote:
> From: Suman Anna <s-anna@ti.com>
> 
> The ICSSG IP on AM64x SoCs have two Industrial Ethernet Peripherals (IEPs)
> to manage/generate Industrial Ethernet functions such as time stamping.
> Each IEP sub-module is sourced from an internal clock mux that can be
> derived from either of the IP instance's ICSSG_IEP_GCLK or from another
> internal ICSSG CORE_CLK mux. Add both the IEP nodes for both the ICSSG
> instances. The IEP clock is currently configured to be derived
> indirectly from the ICSSG_ICLK running at 250 MHz.
> 
> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
> Signed-off-by: Suman Anna <s-anna@ti.com>
> Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
> Signed-off-by: Josua Mayer <josua@solid-run.com>
> ---

This patch is already picked as part of different series:

https://lore.kernel.org/all/20240215103036.2825096-2-danishanwar@ti.com/

>  arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 24 ++++++++++++++++++++++++
>  1 file changed, 24 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> index e348114f42e0..9d2dad8ae8df 100644
> --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> @@ -1244,6 +1244,18 @@ icssg0_iepclk_mux: iepclk-mux@30 {
>  			};
>  		};
>  
> +		icssg0_iep0: iep@2e000 {
> +			compatible = "ti,am654-icss-iep";
> +			reg = <0x2e000 0x1000>;
> +			clocks = <&icssg0_iepclk_mux>;
> +		};
> +
> +		icssg0_iep1: iep@2f000 {
> +			compatible = "ti,am654-icss-iep";
> +			reg = <0x2f000 0x1000>;
> +			clocks = <&icssg0_iepclk_mux>;
> +		};
> +
>  		icssg0_mii_rt: mii-rt@32000 {
>  			compatible = "ti,pruss-mii", "syscon";
>  			reg = <0x32000 0x100>;
> @@ -1385,6 +1397,18 @@ icssg1_iepclk_mux: iepclk-mux@30 {
>  			};
>  		};
>  
> +		icssg1_iep0: iep@2e000 {
> +			compatible = "ti,am654-icss-iep";
> +			reg = <0x2e000 0x1000>;
> +			clocks = <&icssg1_iepclk_mux>;
> +		};
> +
> +		icssg1_iep1: iep@2f000 {
> +			compatible = "ti,am654-icss-iep";
> +			reg = <0x2f000 0x1000>;
> +			clocks = <&icssg1_iepclk_mux>;
> +		};
> +
>  		icssg1_mii_rt: mii-rt@32000 {
>  			compatible = "ti,pruss-mii", "syscon";
>  			reg = <0x32000 0x100>;
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index e348114f42e0..9d2dad8ae8df 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -1244,6 +1244,18 @@  icssg0_iepclk_mux: iepclk-mux@30 {
 			};
 		};
 
+		icssg0_iep0: iep@2e000 {
+			compatible = "ti,am654-icss-iep";
+			reg = <0x2e000 0x1000>;
+			clocks = <&icssg0_iepclk_mux>;
+		};
+
+		icssg0_iep1: iep@2f000 {
+			compatible = "ti,am654-icss-iep";
+			reg = <0x2f000 0x1000>;
+			clocks = <&icssg0_iepclk_mux>;
+		};
+
 		icssg0_mii_rt: mii-rt@32000 {
 			compatible = "ti,pruss-mii", "syscon";
 			reg = <0x32000 0x100>;
@@ -1385,6 +1397,18 @@  icssg1_iepclk_mux: iepclk-mux@30 {
 			};
 		};
 
+		icssg1_iep0: iep@2e000 {
+			compatible = "ti,am654-icss-iep";
+			reg = <0x2e000 0x1000>;
+			clocks = <&icssg1_iepclk_mux>;
+		};
+
+		icssg1_iep1: iep@2f000 {
+			compatible = "ti,am654-icss-iep";
+			reg = <0x2f000 0x1000>;
+			clocks = <&icssg1_iepclk_mux>;
+		};
+
 		icssg1_mii_rt: mii-rt@32000 {
 			compatible = "ti,pruss-mii", "syscon";
 			reg = <0x32000 0x100>;