Message ID | 20240217-inno-phy-v2-2-3bf7e87b0e9e@outlook.com |
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State | New |
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Sat, 17 Feb 2024 14:02:51 +0000 (UTC) From: Yang Xiwen via B4 Relay <devnull+forbidden405.outlook.com@kernel.org> Date: Sat, 17 Feb 2024 22:02:46 +0800 Subject: [PATCH RFC v2 2/4] phy: hisilicon: hisi-inno-phy: enable clocks for every ports Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240217-inno-phy-v2-2-3bf7e87b0e9e@outlook.com> References: <20240217-inno-phy-v2-0-3bf7e87b0e9e@outlook.com> In-Reply-To: <20240217-inno-phy-v2-0-3bf7e87b0e9e@outlook.com> To: Vinod Koul <vkoul@kernel.org>, Kishon Vijay Abraham I <kishon@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Jiancheng Xue <xuejiancheng@hisilicon.com>, Shawn Guo <shawn.guo@linaro.org>, Philipp Zabel <p.zabel@pengutronix.de> Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Kishon Vijay Abraham I <kishon@ti.com>, David Yang <mmyangfl@gmail.com>, Yang Xiwen <forbidden405@outlook.com> X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; 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Series |
phy: hisi-inno-phy: add support for hi3798mv200-usb2-phy
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Commit Message
Yang Xiwen via B4 Relay
Feb. 17, 2024, 2:02 p.m. UTC
From: Yang Xiwen <forbidden405@outlook.com> This is needed for port1 to work. Fixes: ba8b0ee81fbb ("phy: add inno-usb2-phy driver for hi3798cv200 SoC") Signed-off-by: Yang Xiwen <forbidden405@outlook.com> --- drivers/phy/hisilicon/phy-hisi-inno-usb2.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/hisilicon/phy-hisi-inno-usb2.c b/drivers/phy/hisilicon/phy-hisi-inno-usb2.c index c138cd4807d6..b7e740eb4752 100644 --- a/drivers/phy/hisilicon/phy-hisi-inno-usb2.c +++ b/drivers/phy/hisilicon/phy-hisi-inno-usb2.c @@ -86,8 +86,10 @@ static void hisi_inno_phy_write_reg(struct hisi_inno_phy_priv *priv, static void hisi_inno_phy_setup(struct hisi_inno_phy_priv *priv) { + int i; /* The phy clk is controlled by the port0 register 0x06. */ - hisi_inno_phy_write_reg(priv, 0, 0x06, PHY_CLK_ENABLE); + for (i = 0; i < INNO_PHY_PORT_NUM; i++) + hisi_inno_phy_write_reg(priv, i, 0x06, PHY_CLK_ENABLE); msleep(PHY_CLK_STABLE_TIME); }