diff mbox series

[net-next] net: ethernet: adi: adin1110: Reduce the MDIO_TRDONE poll interval

Message ID 20240216103636.1231815-1-ciprian.regus@analog.com
State New
Headers
Series [net-next] net: ethernet: adi: adin1110: Reduce the MDIO_TRDONE poll interval |

Commit Message

Ciprian Regus Feb. 16, 2024, 10:36 a.m. UTC 
  In order to do a clause 22 access to the PHY registers of the ADIN1110,
we have to write the MDIO frame to the ADIN1110_MDIOACC register, and
then poll the MDIO_TRDONE bit (for a 1) in the same register. The
device will set this bit to 1 once the internal MDIO transaction is
done. In practice, this bit takes ~50 - 60 us to be set.

The first attempt to poll the bit is right after the ADIN1110_MDIOACC
register is written, so it will always be read as 0. The next check will
only be done after 10 ms, which will result in the MDIO transactions
taking a long time to complete. Reduce this polling interval to 100 us.

Signed-off-by: Ciprian Regus <ciprian.regus@analog.com>
---
 drivers/net/ethernet/adi/adin1110.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Nuno Sá Feb. 16, 2024, 12:14 p.m. UTC | #1 
On Fri, 2024-02-16 at 12:36 +0200, Ciprian Regus wrote:
> In order to do a clause 22 access to the PHY registers of the ADIN1110,
> we have to write the MDIO frame to the ADIN1110_MDIOACC register, and
> then poll the MDIO_TRDONE bit (for a 1) in the same register. The
> device will set this bit to 1 once the internal MDIO transaction is
> done. In practice, this bit takes ~50 - 60 us to be set.
> 
> The first attempt to poll the bit is right after the ADIN1110_MDIOACC
> register is written, so it will always be read as 0. The next check will
> only be done after 10 ms, which will result in the MDIO transactions
> taking a long time to complete. Reduce this polling interval to 100 us.
> 
> Signed-off-by: Ciprian Regus <ciprian.regus@analog.com>
> ---

Reviewed-by: Nuno Sa <nuno.sa@analog.com>

>  drivers/net/ethernet/adi/adin1110.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/ethernet/adi/adin1110.c
> b/drivers/net/ethernet/adi/adin1110.c
> index d7c274af6d4d..6fca19e6ae67 100644
> --- a/drivers/net/ethernet/adi/adin1110.c
> +++ b/drivers/net/ethernet/adi/adin1110.c
> @@ -467,3 +467,3 @@ static int adin1110_mdio_read(struct mii_bus *bus, int phy_id,
> int reg)
>  	ret = readx_poll_timeout(adin1110_read_mdio_acc, priv, val,
> -				 (val & ADIN1110_MDIO_TRDONE), 10000, 30000);
> +				 (val & ADIN1110_MDIO_TRDONE), 100, 30000);
>  	if (ret < 0)
> @@ -498,3 +498,3 @@ static int adin1110_mdio_write(struct mii_bus *bus, int phy_id,
>  	return readx_poll_timeout(adin1110_read_mdio_acc, priv, val,
> -				  (val & ADIN1110_MDIO_TRDONE), 10000, 30000);
> +				  (val & ADIN1110_MDIO_TRDONE), 100, 30000);
>  }
Andrew Lunn Feb. 17, 2024, 3:42 p.m. UTC | #2 
On Fri, Feb 16, 2024 at 12:36:32PM +0200, Ciprian Regus wrote:
> In order to do a clause 22 access to the PHY registers of the ADIN1110,
> we have to write the MDIO frame to the ADIN1110_MDIOACC register, and
> then poll the MDIO_TRDONE bit (for a 1) in the same register. The
> device will set this bit to 1 once the internal MDIO transaction is
> done. In practice, this bit takes ~50 - 60 us to be set.
> 
> The first attempt to poll the bit is right after the ADIN1110_MDIOACC
> register is written, so it will always be read as 0. The next check will
> only be done after 10 ms, which will result in the MDIO transactions
> taking a long time to complete. Reduce this polling interval to 100 us.
> 
> Signed-off-by: Ciprian Regus <ciprian.regus@analog.com>
> ---
>  drivers/net/ethernet/adi/adin1110.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/ethernet/adi/adin1110.c b/drivers/net/ethernet/adi/adin1110.c
> index d7c274af6d4d..6fca19e6ae67 100644
> --- a/drivers/net/ethernet/adi/adin1110.c
> +++ b/drivers/net/ethernet/adi/adin1110.c
> @@ -467,3 +467,3 @@ static int adin1110_mdio_read(struct mii_bus *bus, int phy_id, int reg)
>  	ret = readx_poll_timeout(adin1110_read_mdio_acc, priv, val,
> -				 (val & ADIN1110_MDIO_TRDONE), 10000, 30000);
> +				 (val & ADIN1110_MDIO_TRDONE), 100, 30000);
>  	if (ret < 0)
> @@ -498,3 +498,3 @@ static int adin1110_mdio_write(struct mii_bus *bus, int phy_id,
>  	return readx_poll_timeout(adin1110_read_mdio_acc, priv, val,
> -				  (val & ADIN1110_MDIO_TRDONE), 10000, 30000);
> +				  (val & ADIN1110_MDIO_TRDONE), 100, 30000);

The kernel can have trouble sleeping for such short times. It might
make sense to swap to the _atomic version which spins rather than
sleeps. If you are just reading a few PHY registers every so often, it
might not be worth it. But if you have an Ethernet switch and need to
access a lot of registers, it could make it a bit faster.

       Andrew
diff mbox series

Patch

diff --git a/drivers/net/ethernet/adi/adin1110.c b/drivers/net/ethernet/adi/adin1110.c
index d7c274af6d4d..6fca19e6ae67 100644
--- a/drivers/net/ethernet/adi/adin1110.c
+++ b/drivers/net/ethernet/adi/adin1110.c
@@ -467,3 +467,3 @@  static int adin1110_mdio_read(struct mii_bus *bus, int phy_id, int reg)
 	ret = readx_poll_timeout(adin1110_read_mdio_acc, priv, val,
-				 (val & ADIN1110_MDIO_TRDONE), 10000, 30000);
+				 (val & ADIN1110_MDIO_TRDONE), 100, 30000);
 	if (ret < 0)
@@ -498,3 +498,3 @@  static int adin1110_mdio_write(struct mii_bus *bus, int phy_id,
 	return readx_poll_timeout(adin1110_read_mdio_acc, priv, val,
-				  (val & ADIN1110_MDIO_TRDONE), 10000, 30000);
+				  (val & ADIN1110_MDIO_TRDONE), 100, 30000);
 }