From patchwork Fri Feb 16 00:57:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Kurapati X-Patchwork-Id: 201861 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:c619:b0:108:e6aa:91d0 with SMTP id hn25csp224275dyb; Thu, 15 Feb 2024 17:06:10 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCV0E0xit/k89FLEIIPSDCygwABlaecv2+Ea4K7HPxjSuxNQ+mG6hzS8pTsN6WMJa1rPs2sTaK86R3HWRvrxmCrDYr3IIQ== X-Google-Smtp-Source: AGHT+IGqc8ZNkEpkC/ud9cv3KIOcHRmdPh78uUgXjEUYLlcBFzGPb4xrqugFFMOOcFjI3veu2vUN X-Received: by 2002:a17:902:b7c9:b0:1db:7052:2f39 with SMTP id v9-20020a170902b7c900b001db70522f39mr2899086plz.26.1708045570163; Thu, 15 Feb 2024 17:06:10 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708045570; cv=pass; d=google.com; s=arc-20160816; b=InaWtOhtX2o5Rezyp5lw5SjA9nOe2wijCSk4dBAZn3FJGPaPD7H6JIqCAnqBSsOa4n YJb/TA8pQqYWZAdg49ZVLfO0Zlfh/wgV2ZUuxhFfAKeSiNn3kk2qAMFTdIKXcwS12Zca JjnO7XYf3jJFUx5zeuoIZ1tH2/BmPCgYybnJ+z9faoQUMLvXYIrTp3ts+rBRTiyitBSp oA35z1ZInYybBMNsk8AM0QFmlFVJEU/ZPaFRKn4ce6ufrEq3RdyJEgWjwa0bnBW/UGss 60EHL0DQD9n0KuFcgeK+KiyEQlxBZyFUZv9Ua20RiC06BirG0X4h2w5AMGZnd5hmVnYL QWNw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=Z3bYhTRiiQvxZ9pfqEtV3Mv1twCj+OvqZpPRG8NMtK4=; fh=4/0ifhPahKNFI/zaFW+v9IgR2gjerOrunjt1gpeALuE=; b=FY4T89umj/XCA4R/z66YU2ahvvUlMvXVQXKi8KjbqcYb7PRBXCejr04N7HaSCM94O7 Dso1xzzp7QWQkZc3XilS2fdnaetZ+z3QFqPTQ/MDE0+OFHXvc7diR93lQ22YWJckTQWb 2MqCxTP6p7jLoc3Iee9DvFjvLGw06I42C3m6zB+LjF2AX0UKnHoZIef0xrFOz9kq54ty JqubfDK64EQlxpLBYhkObJAFuxQfWXZ6PJLI9LGVO3Dfef6OGu8+cTN/1a9skYeNW6Fw zYAj+aBazseR5hVZ/xm2bnyX+4c3OMpyErbnac9Qwq0KGYkjLjedE9GyQetygC42A3J2 XS9w==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=nPvFm8hW; arc=pass (i=1 spf=pass spfdomain=quicinc.com dkim=pass dkdomain=quicinc.com dmarc=pass fromdomain=quicinc.com); spf=pass (google.com: domain of linux-kernel+bounces-67921-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-67921-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. [2604:1380:45e3:2400::1]) by mx.google.com with ESMTPS id g1-20020a170902740100b001db730d3f16si1959668pll.621.2024.02.15.17.06.10 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Feb 2024 17:06:10 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-67921-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) client-ip=2604:1380:45e3:2400::1; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=nPvFm8hW; arc=pass (i=1 spf=pass spfdomain=quicinc.com dkim=pass dkdomain=quicinc.com dmarc=pass fromdomain=quicinc.com); spf=pass (google.com: domain of linux-kernel+bounces-67921-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-67921-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 46BA4281B3F for ; Fri, 16 Feb 2024 01:04:36 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id C5F4A17BA7; Fri, 16 Feb 2024 00:58:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="nPvFm8hW" Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 77EB114AA8; Fri, 16 Feb 2024 00:58:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708045132; cv=none; b=kedOiKEGbB+ds0gYxreCe3CaqE0gGt9SedRaqmVld41NDU9USu/rsMss1w5H9OHBnBNxD8O0K15L82bmrqbJOVCsdJ2MiYGThLgn3DOmDwlUiJoxFcRPDwBQEM8r2jC371YVfQFgRoLlFLnC7aXbTLL7HZ3fmWFJsDJ67GJLD6g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708045132; c=relaxed/simple; bh=tJk5GPSWzHu5iJyfgh1vvpdf+5NuhobzvsMmLQkBAYY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=dC6nfZW8/I3jeHGGLNpzsvCZ5MpBpXlxqUsv4UTi0rY04Wkmj+CngRtUDZMyRsvJwwJpFFwr4DGX0pkeHH/eaPbnKpEuNNL400d1Xu9U4uBljEqwtK1mhjmqkUyUWzIr/0FXL97hT+Zfg0dXVRDU+BPjvPSw4WG2vxXDkiEpfB4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=nPvFm8hW; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 41FNwqW6015358; Fri, 16 Feb 2024 00:58:44 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=Z3bYhTRiiQvxZ9pfqEtV3Mv1twCj+OvqZpPRG8NMtK4=; b=nP vFm8hWHspqU8oM8GvcBB8xUCtv3ug2Ci2wrPgNP2zVDg5vX35zbesVttsKSrRfth qiuli11oGKetXcT0L3U3N+ZzO2OTajO3wedq39MLq23ptACw8MsOseWp2y/39wK4 TnB6lpUVo0WCeKWxmmDLOhhGg6oQG/J9NBDeIq0+9/zCNYEHoAJg06dnXNY9kLuV C5ymQuSNhZOFnAOiZ/LGNn8ELTdZvPs3pIB8NQSO6L6CbOul4IJ5yPD424eIMXiM K5AyY4UD+QtuZXDK4HcxIu5iEbKBqmQHkPZ0miJlPhYft46tOt2Q/+A25qIlLOlI 8B2sgwlntR04dqnDe6qA== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3w9435umgv-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Feb 2024 00:58:44 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 41G0whwp029565 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Feb 2024 00:58:43 GMT Received: from hu-kriskura-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Thu, 15 Feb 2024 16:58:38 -0800 From: Krishna Kurapati To: Krzysztof Kozlowski , Rob Herring , Bjorn Andersson , Wesley Cheng , Konrad Dybcio , "Greg Kroah-Hartman" , Conor Dooley , Thinh Nguyen , Felipe Balbi , Johan Hovold CC: , , , , , , Krishna Kurapati , Rob Herring Subject: [PATCH v15 5/9] dt-bindings: usb: qcom,dwc3: Add bindings for SC8280 Multiport Date: Fri, 16 Feb 2024 06:27:52 +0530 Message-ID: <20240216005756.762712-6-quic_kriskura@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240216005756.762712-1-quic_kriskura@quicinc.com> References: <20240216005756.762712-1-quic_kriskura@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: VIVEcAwZe5Y-wKlmj02gB6WfqIWllQjP X-Proofpoint-ORIG-GUID: VIVEcAwZe5Y-wKlmj02gB6WfqIWllQjP X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-15_24,2024-02-14_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 mlxscore=0 suspectscore=0 spamscore=0 priorityscore=1501 malwarescore=0 adultscore=0 bulkscore=0 mlxlogscore=978 clxscore=1011 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2401310000 definitions=main-2402160006 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791015592056210641 X-GMAIL-MSGID: 1791015592056210641 Add the compatible string for SC8280 Multiport USB controller from Qualcomm. There are 4 power event irq interrupts supported by this controller (one for each port of multiport). Added all the 4 as non-optional interrupts for SC8280XP-MP Also each port of multiport has one DP and oen DM IRQ. Add all DP/DM IRQ's related to 4 ports of SC8280XP Teritiary controller. Also added ss phy irq for both SS Ports. Signed-off-by: Krishna Kurapati Reviewed-by: Bjorn Andersson Reviewed-by: Rob Herring --- .../devicetree/bindings/usb/qcom,dwc3.yaml | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index 63d150b216c5..53cb05e94433 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -30,6 +30,7 @@ properties: - qcom,sc7180-dwc3 - qcom,sc7280-dwc3 - qcom,sc8280xp-dwc3 + - qcom,sc8280xp-dwc3-mp - qcom,sdm660-dwc3 - qcom,sdm670-dwc3 - qcom,sdm845-dwc3 @@ -282,6 +283,7 @@ allOf: contains: enum: - qcom,sc8280xp-dwc3 + - qcom,sc8280xp-dwc3-mp - qcom,x1e80100-dwc3 then: properties: @@ -470,6 +472,38 @@ allOf: - const: dm_hs_phy_irq - const: ss_phy_irq + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8280xp-dwc3-mp + then: + properties: + interrupts: + minItems: 18 + maxItems: 18 + interrupt-names: + items: + - const: pwr_event_1 + - const: pwr_event_2 + - const: pwr_event_3 + - const: pwr_event_4 + - const: hs_phy_1 + - const: hs_phy_2 + - const: hs_phy_3 + - const: hs_phy_4 + - const: dp_hs_phy_1 + - const: dm_hs_phy_1 + - const: dp_hs_phy_2 + - const: dm_hs_phy_2 + - const: dp_hs_phy_3 + - const: dm_hs_phy_3 + - const: dp_hs_phy_4 + - const: dm_hs_phy_4 + - const: ss_phy_1 + - const: ss_phy_2 + additionalProperties: false examples: