Message ID | 20240215101119.12629-7-shawn.sung@mediatek.com |
---|---|
State | New |
Headers |
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Thu, 15 Feb 2024 18:11:23 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Thu, 15 Feb 2024 18:11:22 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Thu, 15 Feb 2024 18:11:22 +0800 From: Hsiao Chien Sung <shawn.sung@mediatek.com> To: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>, Chun-Kuang Hu <chunkuang.hu@kernel.org> CC: Philipp Zabel <p.zabel@pengutronix.de>, David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>, Matthias Brugger <matthias.bgg@gmail.com>, Bibby Hsieh <bibby.hsieh@mediatek.com>, CK Hu <ck.hu@mediatek.com>, Sean Paul <seanpaul@chromium.org>, Fei Shao <fshao@chromium.org>, Jason Chen <jason-ch.chen@mediatek.corp-partner.google.com>, "Nancy . Lin" <nancy.lin@mediatek.com>, <dri-devel@lists.freedesktop.org>, <linux-mediatek@lists.infradead.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, Hsiao Chien Sung <shawn.sung@mediatek.com> Subject: [PATCH v5 06/13] drm/mediatek: Turn off the layers with zero width or height Date: Thu, 15 Feb 2024 18:11:12 +0800 Message-ID: <20240215101119.12629-7-shawn.sung@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240215101119.12629-1-shawn.sung@mediatek.com> References: <20240215101119.12629-1-shawn.sung@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790962387215943106 X-GMAIL-MSGID: 1790962387215943106 |
Series |
Support IGT in display driver
|
|
Commit Message
Shawn Sung (宋孝謙)
Feb. 15, 2024, 10:11 a.m. UTC
We found that IGT (Intel GPU Tool) will try to commit layers with
zero width or height and lead to undefined behaviors in hardware.
Disable the layers in such a situation.
Fixes: 777b7bc86a0a3 ("drm/mediatek: Add ovl_adaptor support for MT8195")
Fixes: fa97fe71f6f93 ("drm/mediatek: Add ETHDR support for MT8195")
Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 2 +-
drivers/gpu/drm/mediatek/mtk_ethdr.c | 7 ++++++-
2 files changed, 7 insertions(+), 2 deletions(-)
Comments
Il 15/02/24 11:11, Hsiao Chien Sung ha scritto: > We found that IGT (Intel GPU Tool) will try to commit layers with > zero width or height and lead to undefined behaviors in hardware. > Disable the layers in such a situation. > > Fixes: 777b7bc86a0a3 ("drm/mediatek: Add ovl_adaptor support for MT8195") > Fixes: fa97fe71f6f93 ("drm/mediatek: Add ETHDR support for MT8195") > > Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> This commit should be sent separately from this series, as it is fixing things that are not related just to IGT, but also to corner cases in regular non-testing usecases. In any case, it's not mandatory as that depends on what the maintainer prefers, so it's CK's call anyway. Besides that, Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > --- > drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 2 +- > drivers/gpu/drm/mediatek/mtk_ethdr.c | 7 ++++++- > 2 files changed, 7 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c > index d4a13a1402148..68a20312ac6f1 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c > @@ -157,7 +157,7 @@ void mtk_ovl_adaptor_layer_config(struct device *dev, unsigned int idx, > merge = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_MERGE0 + idx]; > ethdr = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_ETHDR0]; > > - if (!pending->enable) { > + if (!pending->enable || !pending->width || !pending->height) { > mtk_merge_stop_cmdq(merge, cmdq_pkt); > mtk_mdp_rdma_stop(rdma_l, cmdq_pkt); > mtk_mdp_rdma_stop(rdma_r, cmdq_pkt); > diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c b/drivers/gpu/drm/mediatek/mtk_ethdr.c > index 73dc4da3ba3bd..69872b77922eb 100644 > --- a/drivers/gpu/drm/mediatek/mtk_ethdr.c > +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c > @@ -160,7 +160,12 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx, > if (idx >= 4) > return; > > - if (!pending->enable) { > + if (!pending->enable || !pending->width || !pending->height) { > + /* > + * instead of disabling layer with MIX_SRC_CON directly > + * set the size to 0 to avoid screen shift due to mixer > + * mode switch (hardware behavior) > + */ > mtk_ddp_write(cmdq_pkt, 0, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_SIZE(idx)); > return; > }
On Thu, 2024-02-15 at 11:45 +0100, AngeloGioacchino Del Regno wrote: > Il 15/02/24 11:11, Hsiao Chien Sung ha scritto: > > We found that IGT (Intel GPU Tool) will try to commit layers with > > zero width or height and lead to undefined behaviors in hardware. > > Disable the layers in such a situation. > > > > Fixes: 777b7bc86a0a3 ("drm/mediatek: Add ovl_adaptor support for > > MT8195") > > Fixes: fa97fe71f6f93 ("drm/mediatek: Add ETHDR support for MT8195") > > > > Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> > > This commit should be sent separately from this series, as it is > fixing things > that are not related just to IGT, but also to corner cases in regular > non-testing > usecases. > > In any case, it's not mandatory as that depends on what the > maintainer prefers, > so it's CK's call anyway. > > Besides that, > > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> Got it. Will discuss this with CK. This bug is found when running IGT test while one of the test item commits a layer with zero width and cuase the device to freeze.
Hi, Hsiao-chien: On Thu, 2024-02-15 at 18:11 +0800, Hsiao Chien Sung wrote: > We found that IGT (Intel GPU Tool) will try to commit layers with > zero width or height and lead to undefined behaviors in hardware. > Disable the layers in such a situation. Reviewed-by: CK Hu <ck.hu@mediatek.com> I have reviewed ovl driver, ovl does not have this limitation, so it's better to point out which hardware has this limitation. That's OK if you have no information. Regards, CK > > Fixes: 777b7bc86a0a3 ("drm/mediatek: Add ovl_adaptor support for > MT8195") > Fixes: fa97fe71f6f93 ("drm/mediatek: Add ETHDR support for MT8195") > > Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 2 +- > drivers/gpu/drm/mediatek/mtk_ethdr.c | 7 ++++++- > 2 files changed, 7 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c > b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c > index d4a13a1402148..68a20312ac6f1 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c > @@ -157,7 +157,7 @@ void mtk_ovl_adaptor_layer_config(struct device > *dev, unsigned int idx, > merge = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_MERGE0 + > idx]; > ethdr = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_ETHDR0]; > > - if (!pending->enable) { > + if (!pending->enable || !pending->width || !pending->height) { > mtk_merge_stop_cmdq(merge, cmdq_pkt); > mtk_mdp_rdma_stop(rdma_l, cmdq_pkt); > mtk_mdp_rdma_stop(rdma_r, cmdq_pkt); > diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c > b/drivers/gpu/drm/mediatek/mtk_ethdr.c > index 73dc4da3ba3bd..69872b77922eb 100644 > --- a/drivers/gpu/drm/mediatek/mtk_ethdr.c > +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c > @@ -160,7 +160,12 @@ void mtk_ethdr_layer_config(struct device *dev, > unsigned int idx, > if (idx >= 4) > return; > > - if (!pending->enable) { > + if (!pending->enable || !pending->width || !pending->height) { > + /* > + * instead of disabling layer with MIX_SRC_CON directly > + * set the size to 0 to avoid screen shift due to mixer > + * mode switch (hardware behavior) > + */ > mtk_ddp_write(cmdq_pkt, 0, &mixer->cmdq_base, mixer- > >regs, MIX_L_SRC_SIZE(idx)); > return; > }
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c index d4a13a1402148..68a20312ac6f1 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c @@ -157,7 +157,7 @@ void mtk_ovl_adaptor_layer_config(struct device *dev, unsigned int idx, merge = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_MERGE0 + idx]; ethdr = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_ETHDR0]; - if (!pending->enable) { + if (!pending->enable || !pending->width || !pending->height) { mtk_merge_stop_cmdq(merge, cmdq_pkt); mtk_mdp_rdma_stop(rdma_l, cmdq_pkt); mtk_mdp_rdma_stop(rdma_r, cmdq_pkt); diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c b/drivers/gpu/drm/mediatek/mtk_ethdr.c index 73dc4da3ba3bd..69872b77922eb 100644 --- a/drivers/gpu/drm/mediatek/mtk_ethdr.c +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c @@ -160,7 +160,12 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx, if (idx >= 4) return; - if (!pending->enable) { + if (!pending->enable || !pending->width || !pending->height) { + /* + * instead of disabling layer with MIX_SRC_CON directly + * set the size to 0 to avoid screen shift due to mixer + * mode switch (hardware behavior) + */ mtk_ddp_write(cmdq_pkt, 0, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_SIZE(idx)); return; }