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Thu, 15 Feb 2024 03:45:56 -0700 From: Durai Manickam KR Date: Thu, 15 Feb 2024 16:15:44 +0530 Subject: [PATCH] dt-bindings: dma: convert atmel-dma.txt to YAML Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240215-dmac-v1-1-8f1c6f031c98@microchip.com> X-B4-Tracking: v=1; b=H4sIAFfrzWUC/6tWKk4tykwtVrJSqFYqSi3LLM7MzwNyDHUUlJIzE vPSU3UzU4B8JSMDIxMDI0MT3ZTcxGRd0zQTi7QU8zTjJMsUJaDSgqLUtMwKsDHRsbW1AFX/e49 WAAAA To: Vinod Koul , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , Nicolas Ferre , "Alexandre Belloni" , Claudiu Beznea , Ludovic Desroches , Tudor Ambarus CC: , , , , "Durai Manickam KR" X-Mailer: b4 0.12.4 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790962524972080243 X-GMAIL-MSGID: 1790962524972080243 Added a description, required properties and appropriate compatibles for all the SoCs that are supported by microchip. Signed-off-by: Durai Manickam KR --- .../devicetree/bindings/dma/atmel-dma.txt | 42 ------------- .../bindings/dma/microchip,at91-dma.yaml | 71 ++++++++++++++++++++++ 2 files changed, 71 insertions(+), 42 deletions(-) --- base-commit: 7e90b5c295ec1e47c8ad865429f046970c549a66 change-id: 20240214-dmac-5f48fd7f3b9d Best regards, diff --git a/Documentation/devicetree/bindings/dma/atmel-dma.txt b/Documentation/devicetree/bindings/dma/atmel-dma.txt deleted file mode 100644 index f69bcf5a6343..000000000000 --- a/Documentation/devicetree/bindings/dma/atmel-dma.txt +++ /dev/null @@ -1,42 +0,0 @@ -* Atmel Direct Memory Access Controller (DMA) - -Required properties: -- compatible: Should be "atmel,-dma". -- reg: Should contain DMA registers location and length. -- interrupts: Should contain DMA interrupt. -- #dma-cells: Must be <2>, used to represent the number of integer cells in -the dmas property of client devices. - -Example: - -dma0: dma@ffffec00 { - compatible = "atmel,at91sam9g45-dma"; - reg = <0xffffec00 0x200>; - interrupts = <21>; - #dma-cells = <2>; -}; - -DMA clients connected to the Atmel DMA controller must use the format -described in the dma.txt file, using a three-cell specifier for each channel: -a phandle plus two integer cells. -The three cells in order are: - -1. A phandle pointing to the DMA controller. -2. The memory interface (16 most significant bits), the peripheral interface -(16 less significant bits). -3. Parameters for the at91 DMA configuration register which are device -dependent: - - bit 7-0: peripheral identifier for the hardware handshaking interface. The - identifier can be different for tx and rx. - - bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 2 for ASAP. - -Example: - -i2c0@i2c@f8010000 { - compatible = "atmel,at91sam9x5-i2c"; - reg = <0xf8010000 0x100>; - interrupts = <9 4 6>; - dmas = <&dma0 1 7>, - <&dma0 1 8>; - dma-names = "tx", "rx"; -}; diff --git a/Documentation/devicetree/bindings/dma/microchip,at91-dma.yaml b/Documentation/devicetree/bindings/dma/microchip,at91-dma.yaml new file mode 100644 index 000000000000..a0a582902e4d --- /dev/null +++ b/Documentation/devicetree/bindings/dma/microchip,at91-dma.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/microchip,at91-dma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Atmel Direct Memory Access Controller (DMA) + +maintainers: + - Ludovic Desroches + - Tudor Ambarus + +description: | + The Atmel Direct Memory Access Controller (DMAC) transfers data from a source + peripheral to a destination peripheral over one or more AMBA buses. One channel + is required for each source/destination pair. In the most basic configuration, + the DMAC has one master interface and one channel. The master interface reads + the data from a source and writes it to a destination. Two AMBA transfers are + required for each DMAC data transfer. This is also known as a dual-access transfer. + The DMAC is programmed via the APB interface. + +properties: + compatible: + oneOf: + - enum: + - atmel,at91sam9g45-dma + - atmel,at91sam9rl-dma + reg: + description: Should contain DMA registers location and length. + maxItems: 1 + + interrupts: + description: Should contain the DMA interrupts associated to the DMA channels. + maxItems: 1 + + "#dma-cells": + description: + Must be <2>, used to represent the number of integer cells in the dmas + property of client devices. + const: 2 + + clocks: + description: Should contain a clock specifier for each entry in clock-names. + maxItems: 1 + + clock-names: + description: Should contain the clock of the DMA controller. + const: dma_clk + +required: + - compatible + - reg + - interrupts + - "#dma-cells" + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + dma0: dma-controller@ffffec00 { + compatible = "atmel,at91sam9g45-dma"; + reg = <0xffffec00 0x200>; + interrupts = <21>; + #dma-cells = <2>; + clocks = <&pmc 2 20>; + clock-names = "dma_clk"; + }; + +...